hab.c 14 KB

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  1. /*
  2. * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <config.h>
  8. #include <fuse.h>
  9. #include <asm/io.h>
  10. #include <asm/system.h>
  11. #include <asm/arch/clock.h>
  12. #include <asm/arch/sys_proto.h>
  13. #include <asm/mach-imx/hab.h>
  14. /* -------- start of HAB API updates ------------*/
  15. #define hab_rvt_report_event_p \
  16. ( \
  17. (is_mx6dqp()) ? \
  18. ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
  19. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  20. ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
  21. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  22. ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
  23. ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
  24. )
  25. #define hab_rvt_report_status_p \
  26. ( \
  27. (is_mx6dqp()) ? \
  28. ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  29. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  30. ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  31. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  32. ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  33. ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
  34. )
  35. #define hab_rvt_authenticate_image_p \
  36. ( \
  37. (is_mx6dqp()) ? \
  38. ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  39. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  40. ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  41. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  42. ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  43. ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
  44. )
  45. #define hab_rvt_entry_p \
  46. ( \
  47. (is_mx6dqp()) ? \
  48. ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
  49. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  50. ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
  51. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  52. ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
  53. ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
  54. )
  55. #define hab_rvt_exit_p \
  56. ( \
  57. (is_mx6dqp()) ? \
  58. ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
  59. (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
  60. ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
  61. (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
  62. ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
  63. ((hab_rvt_exit_t *)HAB_RVT_EXIT) \
  64. )
  65. #define ALIGN_SIZE 0x1000
  66. #define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
  67. #define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
  68. #define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
  69. #define IS_HAB_ENABLED_BIT \
  70. (is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
  71. (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
  72. /*
  73. * +------------+ 0x0 (DDR_UIMAGE_START) -
  74. * | Header | |
  75. * +------------+ 0x40 |
  76. * | | |
  77. * | | |
  78. * | | |
  79. * | | |
  80. * | Image Data | |
  81. * . | |
  82. * . | > Stuff to be authenticated ----+
  83. * . | | |
  84. * | | | |
  85. * | | | |
  86. * +------------+ | |
  87. * | | | |
  88. * | Fill Data | | |
  89. * | | | |
  90. * +------------+ Align to ALIGN_SIZE | |
  91. * | IVT | | |
  92. * +------------+ + IVT_SIZE - |
  93. * | | |
  94. * | CSF DATA | <---------------------------------------------------------+
  95. * | |
  96. * +------------+
  97. * | |
  98. * | Fill Data |
  99. * | |
  100. * +------------+ + CSF_PAD_SIZE
  101. */
  102. static bool is_hab_enabled(void);
  103. #if !defined(CONFIG_SPL_BUILD)
  104. #define MAX_RECORD_BYTES (8*1024) /* 4 kbytes */
  105. struct record {
  106. uint8_t tag; /* Tag */
  107. uint8_t len[2]; /* Length */
  108. uint8_t par; /* Version */
  109. uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
  110. bool any_rec_flag;
  111. };
  112. char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
  113. "RSN = HAB_ENG_FAIL (0x30)\n",
  114. "RSN = HAB_INV_ADDRESS (0x22)\n",
  115. "RSN = HAB_INV_ASSERTION (0x0C)\n",
  116. "RSN = HAB_INV_CALL (0x28)\n",
  117. "RSN = HAB_INV_CERTIFICATE (0x21)\n",
  118. "RSN = HAB_INV_COMMAND (0x06)\n",
  119. "RSN = HAB_INV_CSF (0x11)\n",
  120. "RSN = HAB_INV_DCD (0x27)\n",
  121. "RSN = HAB_INV_INDEX (0x0F)\n",
  122. "RSN = HAB_INV_IVT (0x05)\n",
  123. "RSN = HAB_INV_KEY (0x1D)\n",
  124. "RSN = HAB_INV_RETURN (0x1E)\n",
  125. "RSN = HAB_INV_SIGNATURE (0x18)\n",
  126. "RSN = HAB_INV_SIZE (0x17)\n",
  127. "RSN = HAB_MEM_FAIL (0x2E)\n",
  128. "RSN = HAB_OVR_COUNT (0x2B)\n",
  129. "RSN = HAB_OVR_STORAGE (0x2D)\n",
  130. "RSN = HAB_UNS_ALGORITHM (0x12)\n",
  131. "RSN = HAB_UNS_COMMAND (0x03)\n",
  132. "RSN = HAB_UNS_ENGINE (0x0A)\n",
  133. "RSN = HAB_UNS_ITEM (0x24)\n",
  134. "RSN = HAB_UNS_KEY (0x1B)\n",
  135. "RSN = HAB_UNS_PROTOCOL (0x14)\n",
  136. "RSN = HAB_UNS_STATE (0x09)\n",
  137. "RSN = INVALID\n",
  138. NULL};
  139. char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
  140. "STS = HAB_FAILURE (0x33)\n",
  141. "STS = HAB_WARNING (0x69)\n",
  142. "STS = INVALID\n",
  143. NULL};
  144. char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
  145. "ENG = HAB_ENG_SCC (0x03)\n",
  146. "ENG = HAB_ENG_RTIC (0x05)\n",
  147. "ENG = HAB_ENG_SAHARA (0x06)\n",
  148. "ENG = HAB_ENG_CSU (0x0A)\n",
  149. "ENG = HAB_ENG_SRTC (0x0C)\n",
  150. "ENG = HAB_ENG_DCP (0x1B)\n",
  151. "ENG = HAB_ENG_CAAM (0x1D)\n",
  152. "ENG = HAB_ENG_SNVS (0x1E)\n",
  153. "ENG = HAB_ENG_OCOTP (0x21)\n",
  154. "ENG = HAB_ENG_DTCP (0x22)\n",
  155. "ENG = HAB_ENG_ROM (0x36)\n",
  156. "ENG = HAB_ENG_HDCP (0x24)\n",
  157. "ENG = HAB_ENG_RTL (0x77)\n",
  158. "ENG = HAB_ENG_SW (0xFF)\n",
  159. "ENG = INVALID\n",
  160. NULL};
  161. char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
  162. "CTX = HAB_CTX_FAB (0xFF)\n",
  163. "CTX = HAB_CTX_ENTRY (0xE1)\n",
  164. "CTX = HAB_CTX_TARGET (0x33)\n",
  165. "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
  166. "CTX = HAB_CTX_DCD (0xDD)\n",
  167. "CTX = HAB_CTX_CSF (0xCF)\n",
  168. "CTX = HAB_CTX_COMMAND (0xC0)\n",
  169. "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
  170. "CTX = HAB_CTX_ASSERT (0xA0)\n",
  171. "CTX = HAB_CTX_EXIT (0xEE)\n",
  172. "CTX = INVALID\n",
  173. NULL};
  174. uint8_t hab_statuses[5] = {
  175. HAB_STS_ANY,
  176. HAB_FAILURE,
  177. HAB_WARNING,
  178. HAB_SUCCESS,
  179. -1
  180. };
  181. uint8_t hab_reasons[26] = {
  182. HAB_RSN_ANY,
  183. HAB_ENG_FAIL,
  184. HAB_INV_ADDRESS,
  185. HAB_INV_ASSERTION,
  186. HAB_INV_CALL,
  187. HAB_INV_CERTIFICATE,
  188. HAB_INV_COMMAND,
  189. HAB_INV_CSF,
  190. HAB_INV_DCD,
  191. HAB_INV_INDEX,
  192. HAB_INV_IVT,
  193. HAB_INV_KEY,
  194. HAB_INV_RETURN,
  195. HAB_INV_SIGNATURE,
  196. HAB_INV_SIZE,
  197. HAB_MEM_FAIL,
  198. HAB_OVR_COUNT,
  199. HAB_OVR_STORAGE,
  200. HAB_UNS_ALGORITHM,
  201. HAB_UNS_COMMAND,
  202. HAB_UNS_ENGINE,
  203. HAB_UNS_ITEM,
  204. HAB_UNS_KEY,
  205. HAB_UNS_PROTOCOL,
  206. HAB_UNS_STATE,
  207. -1
  208. };
  209. uint8_t hab_contexts[12] = {
  210. HAB_CTX_ANY,
  211. HAB_CTX_FAB,
  212. HAB_CTX_ENTRY,
  213. HAB_CTX_TARGET,
  214. HAB_CTX_AUTHENTICATE,
  215. HAB_CTX_DCD,
  216. HAB_CTX_CSF,
  217. HAB_CTX_COMMAND,
  218. HAB_CTX_AUT_DAT,
  219. HAB_CTX_ASSERT,
  220. HAB_CTX_EXIT,
  221. -1
  222. };
  223. uint8_t hab_engines[16] = {
  224. HAB_ENG_ANY,
  225. HAB_ENG_SCC,
  226. HAB_ENG_RTIC,
  227. HAB_ENG_SAHARA,
  228. HAB_ENG_CSU,
  229. HAB_ENG_SRTC,
  230. HAB_ENG_DCP,
  231. HAB_ENG_CAAM,
  232. HAB_ENG_SNVS,
  233. HAB_ENG_OCOTP,
  234. HAB_ENG_DTCP,
  235. HAB_ENG_ROM,
  236. HAB_ENG_HDCP,
  237. HAB_ENG_RTL,
  238. HAB_ENG_SW,
  239. -1
  240. };
  241. static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
  242. {
  243. uint8_t idx = 0;
  244. uint8_t element = list[idx];
  245. while (element != -1) {
  246. if (element == tgt)
  247. return idx;
  248. element = list[++idx];
  249. }
  250. return -1;
  251. }
  252. void process_event_record(uint8_t *event_data, size_t bytes)
  253. {
  254. struct record *rec = (struct record *)event_data;
  255. printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
  256. printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
  257. printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
  258. printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
  259. }
  260. void display_event(uint8_t *event_data, size_t bytes)
  261. {
  262. uint32_t i;
  263. if (!(event_data && bytes > 0))
  264. return;
  265. for (i = 0; i < bytes; i++) {
  266. if (i == 0)
  267. printf("\t0x%02x", event_data[i]);
  268. else if ((i % 8) == 0)
  269. printf("\n\t0x%02x", event_data[i]);
  270. else
  271. printf(" 0x%02x", event_data[i]);
  272. }
  273. process_event_record(event_data, bytes);
  274. }
  275. int get_hab_status(void)
  276. {
  277. uint32_t index = 0; /* Loop index */
  278. uint8_t event_data[128]; /* Event data buffer */
  279. size_t bytes = sizeof(event_data); /* Event size in bytes */
  280. enum hab_config config = 0;
  281. enum hab_state state = 0;
  282. hab_rvt_report_event_t *hab_rvt_report_event;
  283. hab_rvt_report_status_t *hab_rvt_report_status;
  284. hab_rvt_report_event = hab_rvt_report_event_p;
  285. hab_rvt_report_status = hab_rvt_report_status_p;
  286. if (is_hab_enabled())
  287. puts("\nSecure boot enabled\n");
  288. else
  289. puts("\nSecure boot disabled\n");
  290. /* Check HAB status */
  291. if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
  292. printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
  293. config, state);
  294. /* Display HAB Error events */
  295. while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
  296. &bytes) == HAB_SUCCESS) {
  297. puts("\n");
  298. printf("--------- HAB Event %d -----------------\n",
  299. index + 1);
  300. puts("event data:\n");
  301. display_event(event_data, bytes);
  302. puts("\n");
  303. bytes = sizeof(event_data);
  304. index++;
  305. }
  306. }
  307. /* Display message if no HAB events are found */
  308. else {
  309. printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
  310. config, state);
  311. puts("No HAB Events Found!\n\n");
  312. }
  313. return 0;
  314. }
  315. int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  316. {
  317. if ((argc != 1)) {
  318. cmd_usage(cmdtp);
  319. return 1;
  320. }
  321. get_hab_status();
  322. return 0;
  323. }
  324. static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
  325. char * const argv[])
  326. {
  327. ulong addr, ivt_offset;
  328. int rcode = 0;
  329. if (argc < 3)
  330. return CMD_RET_USAGE;
  331. addr = simple_strtoul(argv[1], NULL, 16);
  332. ivt_offset = simple_strtoul(argv[2], NULL, 16);
  333. rcode = authenticate_image(addr, ivt_offset);
  334. if (rcode == 0)
  335. rcode = CMD_RET_SUCCESS;
  336. else
  337. rcode = CMD_RET_FAILURE;
  338. return rcode;
  339. }
  340. U_BOOT_CMD(
  341. hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
  342. "display HAB status",
  343. ""
  344. );
  345. U_BOOT_CMD(
  346. hab_auth_img, 3, 0, do_authenticate_image,
  347. "authenticate image via HAB",
  348. "addr ivt_offset\n"
  349. "addr - image hex address\n"
  350. "ivt_offset - hex offset of IVT in the image"
  351. );
  352. #endif /* !defined(CONFIG_SPL_BUILD) */
  353. static bool is_hab_enabled(void)
  354. {
  355. struct imx_sec_config_fuse_t *fuse =
  356. (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
  357. uint32_t reg;
  358. int ret;
  359. ret = fuse_read(fuse->bank, fuse->word, &reg);
  360. if (ret) {
  361. puts("\nSecure boot fuse read error\n");
  362. return ret;
  363. }
  364. return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
  365. }
  366. int authenticate_image(uint32_t ddr_start, uint32_t image_size)
  367. {
  368. uint32_t load_addr = 0;
  369. size_t bytes;
  370. ptrdiff_t ivt_offset = 0;
  371. int result = 1;
  372. ulong start;
  373. hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
  374. hab_rvt_entry_t *hab_rvt_entry;
  375. hab_rvt_exit_t *hab_rvt_exit;
  376. hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
  377. hab_rvt_entry = hab_rvt_entry_p;
  378. hab_rvt_exit = hab_rvt_exit_p;
  379. if (!is_hab_enabled()) {
  380. puts("hab fuse not enabled\n");
  381. return result;
  382. }
  383. printf("\nAuthenticate image from DDR location 0x%x...\n",
  384. ddr_start);
  385. hab_caam_clock_enable(1);
  386. if (hab_rvt_entry() != HAB_SUCCESS) {
  387. puts("hab entry function fail\n");
  388. goto hab_caam_clock_disable;
  389. }
  390. /* If not already aligned, Align to ALIGN_SIZE */
  391. ivt_offset = (image_size + ALIGN_SIZE - 1) &
  392. ~(ALIGN_SIZE - 1);
  393. start = ddr_start;
  394. bytes = ivt_offset + IVT_SIZE + CSF_PAD_SIZE;
  395. #ifdef DEBUG
  396. printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n",
  397. ivt_offset, ddr_start + ivt_offset);
  398. puts("Dumping IVT\n");
  399. print_buffer(ddr_start + ivt_offset,
  400. (void *)(ddr_start + ivt_offset),
  401. 4, 0x8, 0);
  402. puts("Dumping CSF Header\n");
  403. print_buffer(ddr_start + ivt_offset + IVT_SIZE,
  404. (void *)(ddr_start + ivt_offset + IVT_SIZE),
  405. 4, 0x10, 0);
  406. #if !defined(CONFIG_SPL_BUILD)
  407. get_hab_status();
  408. #endif
  409. puts("\nCalling authenticate_image in ROM\n");
  410. printf("\tivt_offset = 0x%x\n", ivt_offset);
  411. printf("\tstart = 0x%08lx\n", start);
  412. printf("\tbytes = 0x%x\n", bytes);
  413. #endif
  414. /*
  415. * If the MMU is enabled, we have to notify the ROM
  416. * code, or it won't flush the caches when needed.
  417. * This is done, by setting the "pu_irom_mmu_enabled"
  418. * word to 1. You can find its address by looking in
  419. * the ROM map. This is critical for
  420. * authenticate_image(). If MMU is enabled, without
  421. * setting this bit, authentication will fail and may
  422. * crash.
  423. */
  424. /* Check MMU enabled */
  425. if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
  426. if (is_mx6dq()) {
  427. /*
  428. * This won't work on Rev 1.0.0 of
  429. * i.MX6Q/D, since their ROM doesn't
  430. * do cache flushes. don't think any
  431. * exist, so we ignore them.
  432. */
  433. if (!is_mx6dqp())
  434. writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
  435. } else if (is_mx6sdl()) {
  436. writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
  437. } else if (is_mx6sl()) {
  438. writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
  439. }
  440. }
  441. load_addr = (uint32_t)hab_rvt_authenticate_image(
  442. HAB_CID_UBOOT,
  443. ivt_offset, (void **)&start,
  444. (size_t *)&bytes, NULL);
  445. if (hab_rvt_exit() != HAB_SUCCESS) {
  446. puts("hab exit function fail\n");
  447. load_addr = 0;
  448. }
  449. hab_caam_clock_disable:
  450. hab_caam_clock_enable(0);
  451. #if !defined(CONFIG_SPL_BUILD)
  452. get_hab_status();
  453. #endif
  454. if (load_addr != 0)
  455. result = 0;
  456. return result;
  457. }