fsl_secure_boot.h 4.4 KB

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  1. /*
  2. * Copyright 2015 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #ifndef __FSL_SECURE_BOOT_H
  7. #define __FSL_SECURE_BOOT_H
  8. #ifdef CONFIG_CHAIN_OF_TRUST
  9. #define CONFIG_CMD_ESBC_VALIDATE
  10. #define CONFIG_FSL_SEC_MON
  11. #define CONFIG_SHA_HW_ACCEL
  12. #define CONFIG_SHA_PROG_HW_ACCEL
  13. #ifdef CONFIG_SPL_BUILD
  14. /*
  15. * Define the key hash for U-Boot here if public/private key pair used to
  16. * sign U-boot are different from the SRK hash put in the fuse
  17. * Example of defining KEY_HASH is
  18. * #define CONFIG_SPL_UBOOT_KEY_HASH \
  19. * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
  20. * else leave it defined as NULL
  21. */
  22. #define CONFIG_SPL_UBOOT_KEY_HASH NULL
  23. #endif /* ifdef CONFIG_SPL_BUILD */
  24. #define CONFIG_KEY_REVOCATION
  25. #ifndef CONFIG_SPL_BUILD
  26. #define CONFIG_CMD_HASH
  27. #ifndef CONFIG_SYS_RAMBOOT
  28. /* The key used for verification of next level images
  29. * is picked up from an Extension Table which has
  30. * been verified by the ISBC (Internal Secure boot Code)
  31. * in boot ROM of the SoC.
  32. * The feature is only applicable in case of NOR boot and is
  33. * not applicable in case of RAMBOOT (NAND, SD, SPI).
  34. * For LS, this feature is available for all device if IE Table
  35. * is copied to XIP memory
  36. * Also, for LS, ISBC doesn't verify this table.
  37. */
  38. #define CONFIG_FSL_ISBC_KEY_EXT
  39. #endif
  40. #if defined(CONFIG_FSL_LAYERSCAPE)
  41. /*
  42. * For fsl layerscape based platforms, ESBC image Address in Header
  43. * is 64 bit.
  44. */
  45. #define CONFIG_ESBC_ADDR_64BIT
  46. #endif
  47. #ifdef CONFIG_ARCH_LS2080A
  48. #define CONFIG_EXTRA_ENV \
  49. "setenv fdt_high 0xa0000000;" \
  50. "setenv initrd_high 0xcfffffff;" \
  51. "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
  52. #else
  53. #define CONFIG_EXTRA_ENV \
  54. "setenv fdt_high 0xffffffff;" \
  55. "setenv initrd_high 0xffffffff;" \
  56. "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
  57. #endif
  58. /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
  59. * Non-XIP Memory (Nand/SD)*/
  60. #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
  61. defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
  62. #define CONFIG_BOOTSCRIPT_COPY_RAM
  63. #endif
  64. /* The address needs to be modified according to NOR, NAND, SD and
  65. * DDR memory map
  66. */
  67. #ifdef CONFIG_FSL_LSCH3
  68. #define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000
  69. #define CONFIG_BS_ADDR_DEVICE 0x580e00000
  70. #define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000
  71. #define CONFIG_BS_ADDR_RAM 0xa0e00000
  72. #define CONFIG_BS_HDR_SIZE 0x00002000
  73. #define CONFIG_BS_SIZE 0x00001000
  74. #else
  75. #ifdef CONFIG_SD_BOOT
  76. /* For SD boot address and size are assigned in terms of sector
  77. * offset and no. of sectors respectively.
  78. */
  79. #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
  80. #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
  81. #else
  82. #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
  83. #endif
  84. #define CONFIG_BS_ADDR_DEVICE 0x00000940
  85. #define CONFIG_BS_HDR_SIZE 0x00000010
  86. #define CONFIG_BS_SIZE 0x00000008
  87. #elif defined(CONFIG_NAND_BOOT)
  88. #define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
  89. #define CONFIG_BS_ADDR_DEVICE 0x00802000
  90. #define CONFIG_BS_HDR_SIZE 0x00002000
  91. #define CONFIG_BS_SIZE 0x00001000
  92. #elif defined(CONFIG_QSPI_BOOT)
  93. #ifdef CONFIG_ARCH_LS1046A
  94. #define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
  95. #define CONFIG_BS_ADDR_DEVICE 0x40800000
  96. #elif defined(CONFIG_ARCH_LS1012A)
  97. #define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000
  98. #define CONFIG_BS_ADDR_DEVICE 0x40060000
  99. #else
  100. #error "Platform not supported"
  101. #endif
  102. #define CONFIG_BS_HDR_SIZE 0x00002000
  103. #define CONFIG_BS_SIZE 0x00001000
  104. #else /* Default NOR Boot */
  105. #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
  106. #define CONFIG_BS_ADDR_DEVICE 0x60060000
  107. #define CONFIG_BS_HDR_SIZE 0x00002000
  108. #define CONFIG_BS_SIZE 0x00001000
  109. #endif
  110. #define CONFIG_BS_HDR_ADDR_RAM 0x81000000
  111. #define CONFIG_BS_ADDR_RAM 0x81020000
  112. #endif
  113. #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
  114. #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
  115. #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
  116. #else
  117. #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
  118. /* BOOTSCRIPT_ADDR is not required */
  119. #endif
  120. #ifdef CONFIG_FSL_LS_PPA
  121. /* Define the key hash here if SRK used for signing PPA image is
  122. * different from SRK hash put in SFP used for U-Boot.
  123. * Example
  124. * #define PPA_KEY_HASH \
  125. * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
  126. */
  127. #define PPA_KEY_HASH NULL
  128. #endif /* ifdef CONFIG_FSL_LS_PPA */
  129. #include <config_fsl_chain_trust.h>
  130. #endif /* #ifndef CONFIG_SPL_BUILD */
  131. #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
  132. #endif