board_f.c 26 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099
  1. /*
  2. * Copyright (c) 2011 The Chromium OS Authors.
  3. * (C) Copyright 2002-2006
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Marius Groeger <mgroeger@sysgo.de>
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #include <common.h>
  29. #include <linux/compiler.h>
  30. #include <version.h>
  31. #include <environment.h>
  32. #include <fdtdec.h>
  33. #include <fs.h>
  34. #if defined(CONFIG_CMD_IDE)
  35. #include <ide.h>
  36. #endif
  37. #include <i2c.h>
  38. #include <initcall.h>
  39. #include <logbuff.h>
  40. /* TODO: Can we move these into arch/ headers? */
  41. #ifdef CONFIG_8xx
  42. #include <mpc8xx.h>
  43. #endif
  44. #ifdef CONFIG_5xx
  45. #include <mpc5xx.h>
  46. #endif
  47. #ifdef CONFIG_MPC5xxx
  48. #include <mpc5xxx.h>
  49. #endif
  50. #include <os.h>
  51. #include <post.h>
  52. #include <spi.h>
  53. #include <watchdog.h>
  54. #include <asm/errno.h>
  55. #include <asm/io.h>
  56. #ifdef CONFIG_MP
  57. #include <asm/mp.h>
  58. #endif
  59. #include <asm/sections.h>
  60. #ifdef CONFIG_X86
  61. #include <asm/init_helpers.h>
  62. #include <asm/relocate.h>
  63. #endif
  64. #ifdef CONFIG_SANDBOX
  65. #include <asm/state.h>
  66. #endif
  67. #include <linux/compiler.h>
  68. /*
  69. * Pointer to initial global data area
  70. *
  71. * Here we initialize it if needed.
  72. */
  73. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  74. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  75. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  76. DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
  77. #else
  78. DECLARE_GLOBAL_DATA_PTR;
  79. #endif
  80. /*
  81. * sjg: IMO this code should be
  82. * refactored to a single function, something like:
  83. *
  84. * void led_set_state(enum led_colour_t colour, int on);
  85. */
  86. /************************************************************************
  87. * Coloured LED functionality
  88. ************************************************************************
  89. * May be supplied by boards if desired
  90. */
  91. inline void __coloured_LED_init(void) {}
  92. void coloured_LED_init(void)
  93. __attribute__((weak, alias("__coloured_LED_init")));
  94. inline void __red_led_on(void) {}
  95. void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
  96. inline void __red_led_off(void) {}
  97. void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
  98. inline void __green_led_on(void) {}
  99. void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
  100. inline void __green_led_off(void) {}
  101. void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
  102. inline void __yellow_led_on(void) {}
  103. void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
  104. inline void __yellow_led_off(void) {}
  105. void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
  106. inline void __blue_led_on(void) {}
  107. void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
  108. inline void __blue_led_off(void) {}
  109. void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
  110. /*
  111. * Why is gd allocated a register? Prior to reloc it might be better to
  112. * just pass it around to each function in this file?
  113. *
  114. * After reloc one could argue that it is hardly used and doesn't need
  115. * to be in a register. Or if it is it should perhaps hold pointers to all
  116. * global data for all modules, so that post-reloc we can avoid the massive
  117. * literal pool we get on ARM. Or perhaps just encourage each module to use
  118. * a structure...
  119. */
  120. /*
  121. * Could the CONFIG_SPL_BUILD infection become a flag in gd?
  122. */
  123. #if defined(CONFIG_WATCHDOG)
  124. static int init_func_watchdog_init(void)
  125. {
  126. puts(" Watchdog enabled\n");
  127. WATCHDOG_RESET();
  128. return 0;
  129. }
  130. int init_func_watchdog_reset(void)
  131. {
  132. WATCHDOG_RESET();
  133. return 0;
  134. }
  135. #endif /* CONFIG_WATCHDOG */
  136. void __board_add_ram_info(int use_default)
  137. {
  138. /* please define platform specific board_add_ram_info() */
  139. }
  140. void board_add_ram_info(int)
  141. __attribute__ ((weak, alias("__board_add_ram_info")));
  142. static int init_baud_rate(void)
  143. {
  144. gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
  145. return 0;
  146. }
  147. static int display_text_info(void)
  148. {
  149. #ifndef CONFIG_SANDBOX
  150. ulong bss_start, bss_end;
  151. #ifdef CONFIG_SYS_SYM_OFFSETS
  152. bss_start = _bss_start_ofs + _TEXT_BASE;
  153. bss_end = _bss_end_ofs + _TEXT_BASE;
  154. #else
  155. bss_start = (ulong)&__bss_start;
  156. bss_end = (ulong)&__bss_end;
  157. #endif
  158. debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
  159. CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
  160. #endif
  161. #ifdef CONFIG_MODEM_SUPPORT
  162. debug("Modem Support enabled\n");
  163. #endif
  164. #ifdef CONFIG_USE_IRQ
  165. debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
  166. debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
  167. #endif
  168. return 0;
  169. }
  170. static int announce_dram_init(void)
  171. {
  172. puts("DRAM: ");
  173. return 0;
  174. }
  175. #ifdef CONFIG_PPC
  176. static int init_func_ram(void)
  177. {
  178. #ifdef CONFIG_BOARD_TYPES
  179. int board_type = gd->board_type;
  180. #else
  181. int board_type = 0; /* use dummy arg */
  182. #endif
  183. gd->ram_size = initdram(board_type);
  184. if (gd->ram_size > 0)
  185. return 0;
  186. puts("*** failed ***\n");
  187. return 1;
  188. }
  189. #endif
  190. static int show_dram_config(void)
  191. {
  192. ulong size;
  193. #ifdef CONFIG_NR_DRAM_BANKS
  194. int i;
  195. debug("\nRAM Configuration:\n");
  196. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  197. size += gd->bd->bi_dram[i].size;
  198. debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
  199. #ifdef DEBUG
  200. print_size(gd->bd->bi_dram[i].size, "\n");
  201. #endif
  202. }
  203. debug("\nDRAM: ");
  204. #else
  205. size = gd->ram_size;
  206. #endif
  207. print_size(size, "");
  208. board_add_ram_info(0);
  209. putc('\n');
  210. return 0;
  211. }
  212. ulong get_effective_memsize(void)
  213. {
  214. #ifndef CONFIG_VERY_BIG_RAM
  215. return gd->ram_size;
  216. #else
  217. /* limit stack to what we can reasonable map */
  218. return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
  219. CONFIG_MAX_MEM_MAPPED : gd->ram_size);
  220. #endif
  221. }
  222. void __dram_init_banksize(void)
  223. {
  224. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  225. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  226. gd->bd->bi_dram[0].size = get_effective_memsize();
  227. #endif
  228. }
  229. void dram_init_banksize(void)
  230. __attribute__((weak, alias("__dram_init_banksize")));
  231. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
  232. static int init_func_i2c(void)
  233. {
  234. puts("I2C: ");
  235. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  236. puts("ready\n");
  237. return 0;
  238. }
  239. #endif
  240. #if defined(CONFIG_HARD_SPI)
  241. static int init_func_spi(void)
  242. {
  243. puts("SPI: ");
  244. spi_init();
  245. puts("ready\n");
  246. return 0;
  247. }
  248. #endif
  249. __maybe_unused
  250. static int zero_global_data(void)
  251. {
  252. memset((void *)gd, '\0', sizeof(gd_t));
  253. return 0;
  254. }
  255. static int setup_mon_len(void)
  256. {
  257. #ifdef CONFIG_SYS_SYM_OFFSETS
  258. gd->mon_len = _bss_end_ofs;
  259. #elif defined(CONFIG_SANDBOX)
  260. gd->mon_len = (ulong)&_end - (ulong)_init;
  261. #else
  262. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  263. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  264. #endif
  265. return 0;
  266. }
  267. __weak int arch_cpu_init(void)
  268. {
  269. return 0;
  270. }
  271. #ifdef CONFIG_OF_HOSTFILE
  272. #define CHECK(x) err = (x); if (err) goto failed;
  273. /* Create an empty device tree blob */
  274. static int make_empty_fdt(void *fdt)
  275. {
  276. int err;
  277. CHECK(fdt_create(fdt, 256));
  278. CHECK(fdt_finish_reservemap(fdt));
  279. CHECK(fdt_begin_node(fdt, ""));
  280. CHECK(fdt_end_node(fdt));
  281. CHECK(fdt_finish(fdt));
  282. return 0;
  283. failed:
  284. printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
  285. return -EACCES;
  286. }
  287. static int read_fdt_from_file(void)
  288. {
  289. struct sandbox_state *state = state_get_current();
  290. void *blob;
  291. int size;
  292. int err;
  293. blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
  294. if (!state->fdt_fname) {
  295. err = make_empty_fdt(blob);
  296. if (!err)
  297. goto done;
  298. return err;
  299. }
  300. err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX);
  301. if (err)
  302. return err;
  303. size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0);
  304. if (size < 0)
  305. return -EIO;
  306. done:
  307. gd->fdt_blob = blob;
  308. return 0;
  309. }
  310. #endif
  311. #ifdef CONFIG_SANDBOX
  312. static int setup_ram_buf(void)
  313. {
  314. gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE);
  315. assert(gd->arch.ram_buf);
  316. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  317. return 0;
  318. }
  319. #endif
  320. static int setup_fdt(void)
  321. {
  322. #ifdef CONFIG_OF_EMBED
  323. /* Get a pointer to the FDT */
  324. gd->fdt_blob = _binary_dt_dtb_start;
  325. #elif defined CONFIG_OF_SEPARATE
  326. /* FDT is at end of image */
  327. # ifdef CONFIG_SYS_SYM_OFFSETS
  328. gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
  329. # else
  330. gd->fdt_blob = (ulong *)&_end;
  331. # endif
  332. #elif defined(CONFIG_OF_HOSTFILE)
  333. if (read_fdt_from_file()) {
  334. puts("Failed to read control FDT\n");
  335. return -1;
  336. }
  337. #endif
  338. /* Allow the early environment to override the fdt address */
  339. gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
  340. (uintptr_t)gd->fdt_blob);
  341. return 0;
  342. }
  343. /* Get the top of usable RAM */
  344. __weak ulong board_get_usable_ram_top(ulong total_size)
  345. {
  346. return gd->ram_top;
  347. }
  348. static int setup_dest_addr(void)
  349. {
  350. debug("Monitor len: %08lX\n", gd->mon_len);
  351. /*
  352. * Ram is setup, size stored in gd !!
  353. */
  354. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  355. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  356. /*
  357. * Subtract specified amount of memory to hide so that it won't
  358. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  359. * the Linux kernel should now get passed the now "corrected"
  360. * memory size and won't touch it either. This should work
  361. * for arch/ppc and arch/powerpc. Only Linux board ports in
  362. * arch/powerpc with bootwrapper support, that recalculate the
  363. * memory size from the SDRAM controller setup will have to
  364. * get fixed.
  365. */
  366. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  367. #endif
  368. #ifdef CONFIG_SYS_SDRAM_BASE
  369. gd->ram_top = CONFIG_SYS_SDRAM_BASE;
  370. #endif
  371. gd->ram_top += get_effective_memsize();
  372. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  373. gd->dest_addr = gd->ram_top;
  374. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  375. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  376. /*
  377. * We need to make sure the location we intend to put secondary core
  378. * boot code is reserved and not used by any part of u-boot
  379. */
  380. if (gd->dest_addr > determine_mp_bootpg(NULL)) {
  381. gd->dest_addr = determine_mp_bootpg(NULL);
  382. debug("Reserving MP boot page to %08lx\n", gd->dest_addr);
  383. }
  384. #endif
  385. gd->dest_addr_sp = gd->dest_addr;
  386. return 0;
  387. }
  388. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  389. static int reserve_logbuffer(void)
  390. {
  391. /* reserve kernel log buffer */
  392. gd->dest_addr -= LOGBUFF_RESERVE;
  393. debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
  394. gd->dest_addr);
  395. return 0;
  396. }
  397. #endif
  398. #ifdef CONFIG_PRAM
  399. /* reserve protected RAM */
  400. static int reserve_pram(void)
  401. {
  402. ulong reg;
  403. reg = getenv_ulong("pram", 10, CONFIG_PRAM);
  404. gd->dest_addr -= (reg << 10); /* size is in kB */
  405. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  406. gd->dest_addr);
  407. return 0;
  408. }
  409. #endif /* CONFIG_PRAM */
  410. /* Round memory pointer down to next 4 kB limit */
  411. static int reserve_round_4k(void)
  412. {
  413. gd->dest_addr &= ~(4096 - 1);
  414. return 0;
  415. }
  416. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  417. defined(CONFIG_ARM)
  418. static int reserve_mmu(void)
  419. {
  420. /* reserve TLB table */
  421. gd->arch.tlb_size = 4096 * 4;
  422. gd->dest_addr -= gd->arch.tlb_size;
  423. /* round down to next 64 kB limit */
  424. gd->dest_addr &= ~(0x10000 - 1);
  425. gd->arch.tlb_addr = gd->dest_addr;
  426. debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
  427. gd->arch.tlb_addr + gd->arch.tlb_size);
  428. return 0;
  429. }
  430. #endif
  431. #ifdef CONFIG_LCD
  432. static int reserve_lcd(void)
  433. {
  434. #ifdef CONFIG_FB_ADDR
  435. gd->fb_base = CONFIG_FB_ADDR;
  436. #else
  437. /* reserve memory for LCD display (always full pages) */
  438. gd->dest_addr = lcd_setmem(gd->dest_addr);
  439. gd->fb_base = gd->dest_addr;
  440. #endif /* CONFIG_FB_ADDR */
  441. return 0;
  442. }
  443. #endif /* CONFIG_LCD */
  444. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  445. && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
  446. static int reserve_video(void)
  447. {
  448. /* reserve memory for video display (always full pages) */
  449. gd->dest_addr = video_setmem(gd->dest_addr);
  450. gd->fb_base = gd->dest_addr;
  451. return 0;
  452. }
  453. #endif
  454. static int reserve_uboot(void)
  455. {
  456. /*
  457. * reserve memory for U-Boot code, data & bss
  458. * round down to next 4 kB limit
  459. */
  460. gd->dest_addr -= gd->mon_len;
  461. gd->dest_addr &= ~(4096 - 1);
  462. #ifdef CONFIG_E500
  463. /* round down to next 64 kB limit so that IVPR stays aligned */
  464. gd->dest_addr &= ~(65536 - 1);
  465. #endif
  466. debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
  467. gd->dest_addr);
  468. return 0;
  469. }
  470. #ifndef CONFIG_SPL_BUILD
  471. /* reserve memory for malloc() area */
  472. static int reserve_malloc(void)
  473. {
  474. gd->dest_addr_sp = gd->dest_addr - TOTAL_MALLOC_LEN;
  475. debug("Reserving %dk for malloc() at: %08lx\n",
  476. TOTAL_MALLOC_LEN >> 10, gd->dest_addr_sp);
  477. return 0;
  478. }
  479. /* (permanently) allocate a Board Info struct */
  480. static int reserve_board(void)
  481. {
  482. gd->dest_addr_sp -= sizeof(bd_t);
  483. gd->bd = (bd_t *)map_sysmem(gd->dest_addr_sp, sizeof(bd_t));
  484. memset(gd->bd, '\0', sizeof(bd_t));
  485. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  486. sizeof(bd_t), gd->dest_addr_sp);
  487. return 0;
  488. }
  489. #endif
  490. static int setup_machine(void)
  491. {
  492. #ifdef CONFIG_MACH_TYPE
  493. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  494. #endif
  495. return 0;
  496. }
  497. static int reserve_global_data(void)
  498. {
  499. gd->dest_addr_sp -= sizeof(gd_t);
  500. gd->new_gd = (gd_t *)map_sysmem(gd->dest_addr_sp, sizeof(gd_t));
  501. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  502. sizeof(gd_t), gd->dest_addr_sp);
  503. return 0;
  504. }
  505. static int reserve_fdt(void)
  506. {
  507. /*
  508. * If the device tree is sitting immediate above our image then we
  509. * must relocate it. If it is embedded in the data section, then it
  510. * will be relocated with other data.
  511. */
  512. if (gd->fdt_blob) {
  513. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  514. gd->dest_addr_sp -= gd->fdt_size;
  515. gd->new_fdt = map_sysmem(gd->dest_addr_sp, gd->fdt_size);
  516. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  517. gd->fdt_size, gd->dest_addr_sp);
  518. }
  519. return 0;
  520. }
  521. static int reserve_stacks(void)
  522. {
  523. #ifdef CONFIG_SPL_BUILD
  524. # ifdef CONFIG_ARM
  525. gd->dest_addr_sp -= 128; /* leave 32 words for abort-stack */
  526. gd->irq_sp = gd->dest_addr_sp;
  527. # endif
  528. #else
  529. # ifdef CONFIG_PPC
  530. ulong *s;
  531. # endif
  532. /* setup stack pointer for exceptions */
  533. gd->dest_addr_sp -= 16;
  534. gd->dest_addr_sp &= ~0xf;
  535. gd->irq_sp = gd->dest_addr_sp;
  536. /*
  537. * Handle architecture-specific things here
  538. * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
  539. * to handle this and put in arch/xxx/lib/stack.c
  540. */
  541. # ifdef CONFIG_ARM
  542. # ifdef CONFIG_USE_IRQ
  543. gd->dest_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
  544. debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
  545. CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->dest_addr_sp);
  546. /* 8-byte alignment for ARM ABI compliance */
  547. gd->dest_addr_sp &= ~0x07;
  548. # endif
  549. /* leave 3 words for abort-stack, plus 1 for alignment */
  550. gd->dest_addr_sp -= 16;
  551. # elif defined(CONFIG_PPC)
  552. /* Clear initial stack frame */
  553. s = (ulong *) gd->dest_addr_sp;
  554. *s = 0; /* Terminate back chain */
  555. *++s = 0; /* NULL return address */
  556. # endif /* Architecture specific code */
  557. return 0;
  558. #endif
  559. }
  560. static int display_new_sp(void)
  561. {
  562. debug("New Stack Pointer is: %08lx\n", gd->dest_addr_sp);
  563. return 0;
  564. }
  565. #ifdef CONFIG_PPC
  566. static int setup_board_part1(void)
  567. {
  568. bd_t *bd = gd->bd;
  569. /*
  570. * Save local variables to board info struct
  571. */
  572. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  573. bd->bi_memsize = gd->ram_size; /* size in bytes */
  574. #ifdef CONFIG_SYS_SRAM_BASE
  575. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  576. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  577. #endif
  578. #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
  579. defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  580. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  581. #endif
  582. #if defined(CONFIG_MPC5xxx)
  583. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  584. #endif
  585. #if defined(CONFIG_MPC83xx)
  586. bd->bi_immrbar = CONFIG_SYS_IMMR;
  587. #endif
  588. #if defined(CONFIG_MPC8220)
  589. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  590. bd->bi_inpfreq = gd->arch.inp_clk;
  591. bd->bi_pcifreq = gd->pci_clk;
  592. bd->bi_vcofreq = gd->arch.vco_clk;
  593. bd->bi_pevfreq = gd->arch.pev_clk;
  594. bd->bi_flbfreq = gd->arch.flb_clk;
  595. /* store bootparam to sram (backward compatible), here? */
  596. {
  597. u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
  598. *sram++ = gd->ram_size;
  599. *sram++ = gd->bus_clk;
  600. *sram++ = gd->arch.inp_clk;
  601. *sram++ = gd->cpu_clk;
  602. *sram++ = gd->arch.vco_clk;
  603. *sram++ = gd->arch.flb_clk;
  604. *sram++ = 0xb8c3ba11; /* boot signature */
  605. }
  606. #endif
  607. return 0;
  608. }
  609. static int setup_board_part2(void)
  610. {
  611. bd_t *bd = gd->bd;
  612. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  613. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  614. #if defined(CONFIG_CPM2)
  615. bd->bi_cpmfreq = gd->arch.cpm_clk;
  616. bd->bi_brgfreq = gd->arch.brg_clk;
  617. bd->bi_sccfreq = gd->arch.scc_clk;
  618. bd->bi_vco = gd->arch.vco_out;
  619. #endif /* CONFIG_CPM2 */
  620. #if defined(CONFIG_MPC512X)
  621. bd->bi_ipsfreq = gd->arch.ips_clk;
  622. #endif /* CONFIG_MPC512X */
  623. #if defined(CONFIG_MPC5xxx)
  624. bd->bi_ipbfreq = gd->arch.ipb_clk;
  625. bd->bi_pcifreq = gd->pci_clk;
  626. #endif /* CONFIG_MPC5xxx */
  627. return 0;
  628. }
  629. #endif
  630. #ifdef CONFIG_SYS_EXTBDINFO
  631. static int setup_board_extra(void)
  632. {
  633. bd_t *bd = gd->bd;
  634. strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
  635. strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
  636. sizeof(bd->bi_r_version));
  637. bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
  638. bd->bi_plb_busfreq = gd->bus_clk;
  639. #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
  640. defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
  641. defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
  642. bd->bi_pci_busfreq = get_PCI_freq();
  643. bd->bi_opbfreq = get_OPB_freq();
  644. #elif defined(CONFIG_XILINX_405)
  645. bd->bi_pci_busfreq = get_PCI_freq();
  646. #endif
  647. return 0;
  648. }
  649. #endif
  650. #ifdef CONFIG_POST
  651. static int init_post(void)
  652. {
  653. post_bootmode_init();
  654. post_run(NULL, POST_ROM | post_bootmode_get(0));
  655. return 0;
  656. }
  657. #endif
  658. static int setup_baud_rate(void)
  659. {
  660. /* Ick, can we get rid of this line? */
  661. gd->bd->bi_baudrate = gd->baudrate;
  662. return 0;
  663. }
  664. static int setup_dram_config(void)
  665. {
  666. /* Ram is board specific, so move it to board code ... */
  667. dram_init_banksize();
  668. return 0;
  669. }
  670. static int reloc_fdt(void)
  671. {
  672. if (gd->new_fdt) {
  673. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  674. gd->fdt_blob = gd->new_fdt;
  675. }
  676. return 0;
  677. }
  678. static int setup_reloc(void)
  679. {
  680. gd->relocaddr = gd->dest_addr;
  681. gd->start_addr_sp = gd->dest_addr_sp;
  682. gd->reloc_off = gd->dest_addr - CONFIG_SYS_TEXT_BASE;
  683. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  684. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  685. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  686. gd->dest_addr, (ulong)map_to_sysmem(gd->new_gd),
  687. gd->dest_addr_sp);
  688. return 0;
  689. }
  690. /* ARM calls relocate_code from its crt0.S */
  691. #if !defined(CONFIG_ARM)
  692. static int jump_to_copy(void)
  693. {
  694. /*
  695. * x86 is special, but in a nice way. It uses a trampoline which
  696. * enables the dcache if possible.
  697. *
  698. * For now, other archs use relocate_code(), which is implemented
  699. * similarly for all archs. When we do generic relocation, hopefully
  700. * we can make all archs enable the dcache prior to relocation.
  701. */
  702. #ifdef CONFIG_X86
  703. /*
  704. * SDRAM and console are now initialised. The final stack can now
  705. * be setup in SDRAM. Code execution will continue in Flash, but
  706. * with the stack in SDRAM and Global Data in temporary memory
  707. * (CPU cache)
  708. */
  709. board_init_f_r_trampoline(gd->start_addr_sp);
  710. #elif defined(CONFIG_SANDBOX)
  711. board_init_r(gd->new_gd, 0);
  712. #else
  713. relocate_code(gd->dest_addr_sp, gd->new_gd, gd->dest_addr);
  714. #endif
  715. return 0;
  716. }
  717. #endif
  718. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  719. static int mark_bootstage(void)
  720. {
  721. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  722. return 0;
  723. }
  724. static init_fnc_t init_sequence_f[] = {
  725. #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
  726. !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
  727. !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
  728. zero_global_data,
  729. #endif
  730. #ifdef CONFIG_SANDBOX
  731. setup_ram_buf,
  732. #endif
  733. setup_fdt,
  734. setup_mon_len,
  735. #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
  736. /* TODO: can this go into arch_cpu_init()? */
  737. probecpu,
  738. #endif
  739. arch_cpu_init, /* basic arch cpu dependent setup */
  740. #ifdef CONFIG_X86
  741. cpu_init_f, /* TODO(sjg@chromium.org): remove */
  742. # ifdef CONFIG_OF_CONTROL
  743. find_fdt, /* TODO(sjg@chromium.org): remove */
  744. # endif
  745. #endif
  746. mark_bootstage,
  747. #ifdef CONFIG_OF_CONTROL
  748. fdtdec_check_fdt,
  749. #endif
  750. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  751. board_early_init_f,
  752. #endif
  753. /* TODO: can any of this go into arch_cpu_init()? */
  754. #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
  755. get_clocks, /* get CPU and bus clocks (etc.) */
  756. #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
  757. && !defined(CONFIG_TQM885D)
  758. adjust_sdram_tbs_8xx,
  759. #endif
  760. /* TODO: can we rename this to timer_init()? */
  761. init_timebase,
  762. #endif
  763. #ifdef CONFIG_ARM
  764. timer_init, /* initialize timer */
  765. #endif
  766. #ifdef CONFIG_BOARD_POSTCLK_INIT
  767. board_postclk_init,
  768. #endif
  769. #ifdef CONFIG_FSL_ESDHC
  770. get_clocks,
  771. #endif
  772. #ifdef CONFIG_SYS_ALLOC_DPRAM
  773. #if !defined(CONFIG_CPM2)
  774. dpram_init,
  775. #endif
  776. #endif
  777. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  778. board_postclk_init,
  779. #endif
  780. env_init, /* initialize environment */
  781. #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
  782. /* get CPU and bus clocks according to the environment variable */
  783. get_clocks_866,
  784. /* adjust sdram refresh rate according to the new clock */
  785. sdram_adjust_866,
  786. init_timebase,
  787. #endif
  788. init_baud_rate, /* initialze baudrate settings */
  789. serial_init, /* serial communications setup */
  790. console_init_f, /* stage 1 init of console */
  791. #ifdef CONFIG_SANDBOX
  792. sandbox_early_getopt_check,
  793. #endif
  794. #ifdef CONFIG_OF_CONTROL
  795. fdtdec_prepare_fdt,
  796. #endif
  797. display_options, /* say that we are here */
  798. display_text_info, /* show debugging info if required */
  799. #if defined(CONFIG_8260)
  800. prt_8260_rsr,
  801. prt_8260_clks,
  802. #endif /* CONFIG_8260 */
  803. #if defined(CONFIG_MPC83xx)
  804. prt_83xx_rsr,
  805. #endif
  806. #ifdef CONFIG_PPC
  807. checkcpu,
  808. #endif
  809. #if defined(CONFIG_DISPLAY_CPUINFO)
  810. print_cpuinfo, /* display cpu info (and speed) */
  811. #endif
  812. #if defined(CONFIG_MPC5xxx)
  813. prt_mpc5xxx_clks,
  814. #endif /* CONFIG_MPC5xxx */
  815. #if defined(CONFIG_MPC8220)
  816. prt_mpc8220_clks,
  817. #endif
  818. #if defined(CONFIG_DISPLAY_BOARDINFO)
  819. checkboard, /* display board info */
  820. #endif
  821. INIT_FUNC_WATCHDOG_INIT
  822. #if defined(CONFIG_MISC_INIT_F)
  823. misc_init_f,
  824. #endif
  825. INIT_FUNC_WATCHDOG_RESET
  826. #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
  827. init_func_i2c,
  828. #endif
  829. #if defined(CONFIG_HARD_SPI)
  830. init_func_spi,
  831. #endif
  832. #ifdef CONFIG_X86
  833. dram_init_f, /* configure available RAM banks */
  834. calculate_relocation_address,
  835. #endif
  836. announce_dram_init,
  837. /* TODO: unify all these dram functions? */
  838. #ifdef CONFIG_ARM
  839. dram_init, /* configure available RAM banks */
  840. #endif
  841. #ifdef CONFIG_PPC
  842. init_func_ram,
  843. #endif
  844. #ifdef CONFIG_POST
  845. post_init_f,
  846. #endif
  847. INIT_FUNC_WATCHDOG_RESET
  848. #if defined(CONFIG_SYS_DRAM_TEST)
  849. testdram,
  850. #endif /* CONFIG_SYS_DRAM_TEST */
  851. INIT_FUNC_WATCHDOG_RESET
  852. #ifdef CONFIG_POST
  853. init_post,
  854. #endif
  855. INIT_FUNC_WATCHDOG_RESET
  856. /*
  857. * Now that we have DRAM mapped and working, we can
  858. * relocate the code and continue running from DRAM.
  859. *
  860. * Reserve memory at end of RAM for (top down in that order):
  861. * - area that won't get touched by U-Boot and Linux (optional)
  862. * - kernel log buffer
  863. * - protected RAM
  864. * - LCD framebuffer
  865. * - monitor code
  866. * - board info struct
  867. */
  868. setup_dest_addr,
  869. #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
  870. reserve_logbuffer,
  871. #endif
  872. #ifdef CONFIG_PRAM
  873. reserve_pram,
  874. #endif
  875. reserve_round_4k,
  876. #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
  877. defined(CONFIG_ARM)
  878. reserve_mmu,
  879. #endif
  880. #ifdef CONFIG_LCD
  881. reserve_lcd,
  882. #endif
  883. /* TODO: Why the dependency on CONFIG_8xx? */
  884. #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
  885. && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
  886. reserve_video,
  887. #endif
  888. reserve_uboot,
  889. #ifndef CONFIG_SPL_BUILD
  890. reserve_malloc,
  891. reserve_board,
  892. #endif
  893. setup_machine,
  894. reserve_global_data,
  895. reserve_fdt,
  896. reserve_stacks,
  897. setup_dram_config,
  898. show_dram_config,
  899. #ifdef CONFIG_PPC
  900. setup_board_part1,
  901. INIT_FUNC_WATCHDOG_RESET
  902. setup_board_part2,
  903. #endif
  904. setup_baud_rate,
  905. display_new_sp,
  906. #ifdef CONFIG_SYS_EXTBDINFO
  907. setup_board_extra,
  908. #endif
  909. INIT_FUNC_WATCHDOG_RESET
  910. reloc_fdt,
  911. setup_reloc,
  912. #ifndef CONFIG_ARM
  913. jump_to_copy,
  914. #endif
  915. NULL,
  916. };
  917. void board_init_f(ulong boot_flags)
  918. {
  919. #ifndef CONFIG_X86
  920. gd_t data;
  921. gd = &data;
  922. #endif
  923. gd->flags = boot_flags;
  924. if (initcall_run_list(init_sequence_f))
  925. hang();
  926. #ifndef CONFIG_ARM
  927. /* NOTREACHED - jump_to_copy() does not return */
  928. hang();
  929. #endif
  930. }
  931. #ifdef CONFIG_X86
  932. /*
  933. * For now this code is only used on x86.
  934. *
  935. * init_sequence_f_r is the list of init functions which are run when
  936. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  937. * The following limitations must be considered when implementing an
  938. * '_f_r' function:
  939. * - 'static' variables are read-only
  940. * - Global Data (gd->xxx) is read/write
  941. *
  942. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  943. * supported). It _should_, if possible, copy global data to RAM and
  944. * initialise the CPU caches (to speed up the relocation process)
  945. *
  946. * NOTE: At present only x86 uses this route, but it is intended that
  947. * all archs will move to this when generic relocation is implemented.
  948. */
  949. static init_fnc_t init_sequence_f_r[] = {
  950. init_cache_f_r,
  951. copy_uboot_to_ram,
  952. clear_bss,
  953. do_elf_reloc_fixups,
  954. NULL,
  955. };
  956. void board_init_f_r(void)
  957. {
  958. if (initcall_run_list(init_sequence_f_r))
  959. hang();
  960. /*
  961. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  962. * Transfer execution from Flash to RAM by calculating the address
  963. * of the in-RAM copy of board_init_r() and calling it
  964. */
  965. (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
  966. /* NOTREACHED - board_init_r() does not return */
  967. hang();
  968. }
  969. #endif /* CONFIG_X86 */
  970. void hang(void)
  971. {
  972. puts("### ERROR ### Please RESET the board ###\n");
  973. #ifdef CONFIG_SANDBOX
  974. os_exit(0);
  975. #else
  976. for (;;);
  977. #endif
  978. }