cfi_flash.c 62 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. #include <mtd/cfi_flash.h>
  41. #include <watchdog.h>
  42. /*
  43. * This file implements a Common Flash Interface (CFI) driver for
  44. * U-Boot.
  45. *
  46. * The width of the port and the width of the chips are determined at
  47. * initialization. These widths are used to calculate the address for
  48. * access CFI data structures.
  49. *
  50. * References
  51. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  52. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  53. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  54. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  55. * AMD CFI Specification, Release 2.0 December 1, 2001
  56. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  57. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  58. *
  59. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  60. * reading and writing ... (yes there is such a Hardware).
  61. */
  62. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  63. #ifdef CONFIG_FLASH_CFI_MTD
  64. static uint flash_verbose = 1;
  65. #else
  66. #define flash_verbose 1
  67. #endif
  68. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  69. /*
  70. * Check if chip width is defined. If not, start detecting with 8bit.
  71. */
  72. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  73. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  74. #endif
  75. /*
  76. * 0xffff is an undefined value for the configuration register. When
  77. * this value is returned, the configuration register shall not be
  78. * written at all (default mode).
  79. */
  80. static u16 cfi_flash_config_reg(int i)
  81. {
  82. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  83. return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  84. #else
  85. return 0xffff;
  86. #endif
  87. }
  88. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  89. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  90. #endif
  91. static phys_addr_t __cfi_flash_bank_addr(int i)
  92. {
  93. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  94. }
  95. phys_addr_t cfi_flash_bank_addr(int i)
  96. __attribute__((weak, alias("__cfi_flash_bank_addr")));
  97. static unsigned long __cfi_flash_bank_size(int i)
  98. {
  99. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  100. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  101. #else
  102. return 0;
  103. #endif
  104. }
  105. unsigned long cfi_flash_bank_size(int i)
  106. __attribute__((weak, alias("__cfi_flash_bank_size")));
  107. static void __flash_write8(u8 value, void *addr)
  108. {
  109. __raw_writeb(value, addr);
  110. }
  111. static void __flash_write16(u16 value, void *addr)
  112. {
  113. __raw_writew(value, addr);
  114. }
  115. static void __flash_write32(u32 value, void *addr)
  116. {
  117. __raw_writel(value, addr);
  118. }
  119. static void __flash_write64(u64 value, void *addr)
  120. {
  121. /* No architectures currently implement __raw_writeq() */
  122. *(volatile u64 *)addr = value;
  123. }
  124. static u8 __flash_read8(void *addr)
  125. {
  126. return __raw_readb(addr);
  127. }
  128. static u16 __flash_read16(void *addr)
  129. {
  130. return __raw_readw(addr);
  131. }
  132. static u32 __flash_read32(void *addr)
  133. {
  134. return __raw_readl(addr);
  135. }
  136. static u64 __flash_read64(void *addr)
  137. {
  138. /* No architectures currently implement __raw_readq() */
  139. return *(volatile u64 *)addr;
  140. }
  141. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  142. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  143. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  144. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  145. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  146. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  147. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  148. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  149. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  150. #else
  151. #define flash_write8 __flash_write8
  152. #define flash_write16 __flash_write16
  153. #define flash_write32 __flash_write32
  154. #define flash_write64 __flash_write64
  155. #define flash_read8 __flash_read8
  156. #define flash_read16 __flash_read16
  157. #define flash_read32 __flash_read32
  158. #define flash_read64 __flash_read64
  159. #endif
  160. /*-----------------------------------------------------------------------
  161. */
  162. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  163. flash_info_t *flash_get_info(ulong base)
  164. {
  165. int i;
  166. flash_info_t *info = NULL;
  167. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  168. info = & flash_info[i];
  169. if (info->size && info->start[0] <= base &&
  170. base <= info->start[0] + info->size - 1)
  171. break;
  172. }
  173. return info;
  174. }
  175. #endif
  176. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  177. {
  178. if (sect != (info->sector_count - 1))
  179. return info->start[sect + 1] - info->start[sect];
  180. else
  181. return info->start[0] + info->size - info->start[sect];
  182. }
  183. /*-----------------------------------------------------------------------
  184. * create an address based on the offset and the port width
  185. */
  186. static inline void *
  187. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  188. {
  189. unsigned int byte_offset = offset * info->portwidth;
  190. return (void *)(info->start[sect] + byte_offset);
  191. }
  192. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  193. unsigned int offset, void *addr)
  194. {
  195. }
  196. /*-----------------------------------------------------------------------
  197. * make a proper sized command based on the port and chip widths
  198. */
  199. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  200. {
  201. int i;
  202. int cword_offset;
  203. int cp_offset;
  204. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  205. u32 cmd_le = cpu_to_le32(cmd);
  206. #endif
  207. uchar val;
  208. uchar *cp = (uchar *) cmdbuf;
  209. for (i = info->portwidth; i > 0; i--){
  210. cword_offset = (info->portwidth-i)%info->chipwidth;
  211. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  212. cp_offset = info->portwidth - i;
  213. val = *((uchar*)&cmd_le + cword_offset);
  214. #else
  215. cp_offset = i - 1;
  216. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  217. #endif
  218. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  219. }
  220. }
  221. #ifdef DEBUG
  222. /*-----------------------------------------------------------------------
  223. * Debug support
  224. */
  225. static void print_longlong (char *str, unsigned long long data)
  226. {
  227. int i;
  228. char *cp;
  229. cp = (char *) &data;
  230. for (i = 0; i < 8; i++)
  231. sprintf (&str[i * 2], "%2.2x", *cp++);
  232. }
  233. static void flash_printqry (struct cfi_qry *qry)
  234. {
  235. u8 *p = (u8 *)qry;
  236. int x, y;
  237. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  238. debug("%02x : ", x);
  239. for (y = 0; y < 16; y++)
  240. debug("%2.2x ", p[x + y]);
  241. debug(" ");
  242. for (y = 0; y < 16; y++) {
  243. unsigned char c = p[x + y];
  244. if (c >= 0x20 && c <= 0x7e)
  245. debug("%c", c);
  246. else
  247. debug(".");
  248. }
  249. debug("\n");
  250. }
  251. }
  252. #endif
  253. /*-----------------------------------------------------------------------
  254. * read a character at a port width address
  255. */
  256. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  257. {
  258. uchar *cp;
  259. uchar retval;
  260. cp = flash_map (info, 0, offset);
  261. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  262. retval = flash_read8(cp);
  263. #else
  264. retval = flash_read8(cp + info->portwidth - 1);
  265. #endif
  266. flash_unmap (info, 0, offset, cp);
  267. return retval;
  268. }
  269. /*-----------------------------------------------------------------------
  270. * read a word at a port width address, assume 16bit bus
  271. */
  272. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  273. {
  274. ushort *addr, retval;
  275. addr = flash_map (info, 0, offset);
  276. retval = flash_read16 (addr);
  277. flash_unmap (info, 0, offset, addr);
  278. return retval;
  279. }
  280. /*-----------------------------------------------------------------------
  281. * read a long word by picking the least significant byte of each maximum
  282. * port size word. Swap for ppc format.
  283. */
  284. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  285. uint offset)
  286. {
  287. uchar *addr;
  288. ulong retval;
  289. #ifdef DEBUG
  290. int x;
  291. #endif
  292. addr = flash_map (info, sect, offset);
  293. #ifdef DEBUG
  294. debug ("long addr is at %p info->portwidth = %d\n", addr,
  295. info->portwidth);
  296. for (x = 0; x < 4 * info->portwidth; x++) {
  297. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  298. }
  299. #endif
  300. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  301. retval = ((flash_read8(addr) << 16) |
  302. (flash_read8(addr + info->portwidth) << 24) |
  303. (flash_read8(addr + 2 * info->portwidth)) |
  304. (flash_read8(addr + 3 * info->portwidth) << 8));
  305. #else
  306. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  307. (flash_read8(addr + info->portwidth - 1) << 16) |
  308. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  309. (flash_read8(addr + 3 * info->portwidth - 1)));
  310. #endif
  311. flash_unmap(info, sect, offset, addr);
  312. return retval;
  313. }
  314. /*
  315. * Write a proper sized command to the correct address
  316. */
  317. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  318. uint offset, u32 cmd)
  319. {
  320. void *addr;
  321. cfiword_t cword;
  322. addr = flash_map (info, sect, offset);
  323. flash_make_cmd (info, cmd, &cword);
  324. switch (info->portwidth) {
  325. case FLASH_CFI_8BIT:
  326. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  327. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  328. flash_write8(cword.c, addr);
  329. break;
  330. case FLASH_CFI_16BIT:
  331. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  332. cmd, cword.w,
  333. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  334. flash_write16(cword.w, addr);
  335. break;
  336. case FLASH_CFI_32BIT:
  337. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  338. cmd, cword.l,
  339. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  340. flash_write32(cword.l, addr);
  341. break;
  342. case FLASH_CFI_64BIT:
  343. #ifdef DEBUG
  344. {
  345. char str[20];
  346. print_longlong (str, cword.ll);
  347. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  348. addr, cmd, str,
  349. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  350. }
  351. #endif
  352. flash_write64(cword.ll, addr);
  353. break;
  354. }
  355. /* Ensure all the instructions are fully finished */
  356. sync();
  357. flash_unmap(info, sect, offset, addr);
  358. }
  359. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  360. {
  361. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  362. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  363. }
  364. /*-----------------------------------------------------------------------
  365. */
  366. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  367. uint offset, uchar cmd)
  368. {
  369. void *addr;
  370. cfiword_t cword;
  371. int retval;
  372. addr = flash_map (info, sect, offset);
  373. flash_make_cmd (info, cmd, &cword);
  374. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  375. switch (info->portwidth) {
  376. case FLASH_CFI_8BIT:
  377. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  378. retval = (flash_read8(addr) == cword.c);
  379. break;
  380. case FLASH_CFI_16BIT:
  381. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  382. retval = (flash_read16(addr) == cword.w);
  383. break;
  384. case FLASH_CFI_32BIT:
  385. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  386. retval = (flash_read32(addr) == cword.l);
  387. break;
  388. case FLASH_CFI_64BIT:
  389. #ifdef DEBUG
  390. {
  391. char str1[20];
  392. char str2[20];
  393. print_longlong (str1, flash_read64(addr));
  394. print_longlong (str2, cword.ll);
  395. debug ("is= %s %s\n", str1, str2);
  396. }
  397. #endif
  398. retval = (flash_read64(addr) == cword.ll);
  399. break;
  400. default:
  401. retval = 0;
  402. break;
  403. }
  404. flash_unmap(info, sect, offset, addr);
  405. return retval;
  406. }
  407. /*-----------------------------------------------------------------------
  408. */
  409. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  410. uint offset, uchar cmd)
  411. {
  412. void *addr;
  413. cfiword_t cword;
  414. int retval;
  415. addr = flash_map (info, sect, offset);
  416. flash_make_cmd (info, cmd, &cword);
  417. switch (info->portwidth) {
  418. case FLASH_CFI_8BIT:
  419. retval = ((flash_read8(addr) & cword.c) == cword.c);
  420. break;
  421. case FLASH_CFI_16BIT:
  422. retval = ((flash_read16(addr) & cword.w) == cword.w);
  423. break;
  424. case FLASH_CFI_32BIT:
  425. retval = ((flash_read32(addr) & cword.l) == cword.l);
  426. break;
  427. case FLASH_CFI_64BIT:
  428. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  429. break;
  430. default:
  431. retval = 0;
  432. break;
  433. }
  434. flash_unmap(info, sect, offset, addr);
  435. return retval;
  436. }
  437. /*-----------------------------------------------------------------------
  438. */
  439. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  440. uint offset, uchar cmd)
  441. {
  442. void *addr;
  443. cfiword_t cword;
  444. int retval;
  445. addr = flash_map (info, sect, offset);
  446. flash_make_cmd (info, cmd, &cword);
  447. switch (info->portwidth) {
  448. case FLASH_CFI_8BIT:
  449. retval = flash_read8(addr) != flash_read8(addr);
  450. break;
  451. case FLASH_CFI_16BIT:
  452. retval = flash_read16(addr) != flash_read16(addr);
  453. break;
  454. case FLASH_CFI_32BIT:
  455. retval = flash_read32(addr) != flash_read32(addr);
  456. break;
  457. case FLASH_CFI_64BIT:
  458. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  459. (flash_read32(addr+4) != flash_read32(addr+4)) );
  460. break;
  461. default:
  462. retval = 0;
  463. break;
  464. }
  465. flash_unmap(info, sect, offset, addr);
  466. return retval;
  467. }
  468. /*
  469. * flash_is_busy - check to see if the flash is busy
  470. *
  471. * This routine checks the status of the chip and returns true if the
  472. * chip is busy.
  473. */
  474. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  475. {
  476. int retval;
  477. switch (info->vendor) {
  478. case CFI_CMDSET_INTEL_PROG_REGIONS:
  479. case CFI_CMDSET_INTEL_STANDARD:
  480. case CFI_CMDSET_INTEL_EXTENDED:
  481. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  482. break;
  483. case CFI_CMDSET_AMD_STANDARD:
  484. case CFI_CMDSET_AMD_EXTENDED:
  485. #ifdef CONFIG_FLASH_CFI_LEGACY
  486. case CFI_CMDSET_AMD_LEGACY:
  487. #endif
  488. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  489. break;
  490. default:
  491. retval = 0;
  492. }
  493. debug ("flash_is_busy: %d\n", retval);
  494. return retval;
  495. }
  496. /*-----------------------------------------------------------------------
  497. * wait for XSR.7 to be set. Time out with an error if it does not.
  498. * This routine does not set the flash to read-array mode.
  499. */
  500. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  501. ulong tout, char *prompt)
  502. {
  503. ulong start;
  504. #if CONFIG_SYS_HZ != 1000
  505. if ((ulong)CONFIG_SYS_HZ > 100000)
  506. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  507. else
  508. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  509. #endif
  510. /* Wait for command completion */
  511. #ifdef CONFIG_SYS_LOW_RES_TIMER
  512. reset_timer();
  513. #endif
  514. start = get_timer (0);
  515. WATCHDOG_RESET();
  516. while (flash_is_busy (info, sector)) {
  517. if (get_timer (start) > tout) {
  518. printf ("Flash %s timeout at address %lx data %lx\n",
  519. prompt, info->start[sector],
  520. flash_read_long (info, sector, 0));
  521. flash_write_cmd (info, sector, 0, info->cmd_reset);
  522. udelay(1);
  523. return ERR_TIMOUT;
  524. }
  525. udelay (1); /* also triggers watchdog */
  526. }
  527. return ERR_OK;
  528. }
  529. /*-----------------------------------------------------------------------
  530. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  531. * do a full status check.
  532. *
  533. * This routine sets the flash to read-array mode.
  534. */
  535. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  536. ulong tout, char *prompt)
  537. {
  538. int retcode;
  539. retcode = flash_status_check (info, sector, tout, prompt);
  540. switch (info->vendor) {
  541. case CFI_CMDSET_INTEL_PROG_REGIONS:
  542. case CFI_CMDSET_INTEL_EXTENDED:
  543. case CFI_CMDSET_INTEL_STANDARD:
  544. if ((retcode != ERR_OK)
  545. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  546. retcode = ERR_INVAL;
  547. printf ("Flash %s error at address %lx\n", prompt,
  548. info->start[sector]);
  549. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  550. FLASH_STATUS_PSLBS)) {
  551. puts ("Command Sequence Error.\n");
  552. } else if (flash_isset (info, sector, 0,
  553. FLASH_STATUS_ECLBS)) {
  554. puts ("Block Erase Error.\n");
  555. retcode = ERR_NOT_ERASED;
  556. } else if (flash_isset (info, sector, 0,
  557. FLASH_STATUS_PSLBS)) {
  558. puts ("Locking Error\n");
  559. }
  560. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  561. puts ("Block locked.\n");
  562. retcode = ERR_PROTECTED;
  563. }
  564. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  565. puts ("Vpp Low Error.\n");
  566. }
  567. flash_write_cmd (info, sector, 0, info->cmd_reset);
  568. udelay(1);
  569. break;
  570. default:
  571. break;
  572. }
  573. return retcode;
  574. }
  575. static int use_flash_status_poll(flash_info_t *info)
  576. {
  577. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  578. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  579. info->vendor == CFI_CMDSET_AMD_STANDARD)
  580. return 1;
  581. #endif
  582. return 0;
  583. }
  584. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  585. ulong tout, char *prompt)
  586. {
  587. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  588. ulong start;
  589. int ready;
  590. #if CONFIG_SYS_HZ != 1000
  591. if ((ulong)CONFIG_SYS_HZ > 100000)
  592. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  593. else
  594. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  595. #endif
  596. /* Wait for command completion */
  597. #ifdef CONFIG_SYS_LOW_RES_TIMER
  598. reset_timer();
  599. #endif
  600. start = get_timer(0);
  601. WATCHDOG_RESET();
  602. while (1) {
  603. switch (info->portwidth) {
  604. case FLASH_CFI_8BIT:
  605. ready = flash_read8(dst) == flash_read8(src);
  606. break;
  607. case FLASH_CFI_16BIT:
  608. ready = flash_read16(dst) == flash_read16(src);
  609. break;
  610. case FLASH_CFI_32BIT:
  611. ready = flash_read32(dst) == flash_read32(src);
  612. break;
  613. case FLASH_CFI_64BIT:
  614. ready = flash_read64(dst) == flash_read64(src);
  615. break;
  616. default:
  617. ready = 0;
  618. break;
  619. }
  620. if (ready)
  621. break;
  622. if (get_timer(start) > tout) {
  623. printf("Flash %s timeout at address %lx data %lx\n",
  624. prompt, (ulong)dst, (ulong)flash_read8(dst));
  625. return ERR_TIMOUT;
  626. }
  627. udelay(1); /* also triggers watchdog */
  628. }
  629. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  630. return ERR_OK;
  631. }
  632. /*-----------------------------------------------------------------------
  633. */
  634. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  635. {
  636. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  637. unsigned short w;
  638. unsigned int l;
  639. unsigned long long ll;
  640. #endif
  641. switch (info->portwidth) {
  642. case FLASH_CFI_8BIT:
  643. cword->c = c;
  644. break;
  645. case FLASH_CFI_16BIT:
  646. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  647. w = c;
  648. w <<= 8;
  649. cword->w = (cword->w >> 8) | w;
  650. #else
  651. cword->w = (cword->w << 8) | c;
  652. #endif
  653. break;
  654. case FLASH_CFI_32BIT:
  655. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  656. l = c;
  657. l <<= 24;
  658. cword->l = (cword->l >> 8) | l;
  659. #else
  660. cword->l = (cword->l << 8) | c;
  661. #endif
  662. break;
  663. case FLASH_CFI_64BIT:
  664. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  665. ll = c;
  666. ll <<= 56;
  667. cword->ll = (cword->ll >> 8) | ll;
  668. #else
  669. cword->ll = (cword->ll << 8) | c;
  670. #endif
  671. break;
  672. }
  673. }
  674. /*
  675. * Loop through the sector table starting from the previously found sector.
  676. * Searches forwards or backwards, dependent on the passed address.
  677. */
  678. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  679. {
  680. static flash_sect_t saved_sector; /* previously found sector */
  681. static flash_info_t *saved_info; /* previously used flash bank */
  682. flash_sect_t sector = saved_sector;
  683. if ((info != saved_info) || (sector >= info->sector_count))
  684. sector = 0;
  685. while ((info->start[sector] < addr)
  686. && (sector < info->sector_count - 1))
  687. sector++;
  688. while ((info->start[sector] > addr) && (sector > 0))
  689. /*
  690. * also decrements the sector in case of an overshot
  691. * in the first loop
  692. */
  693. sector--;
  694. saved_sector = sector;
  695. saved_info = info;
  696. return sector;
  697. }
  698. /*-----------------------------------------------------------------------
  699. */
  700. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  701. cfiword_t cword)
  702. {
  703. void *dstaddr = (void *)dest;
  704. int flag;
  705. flash_sect_t sect = 0;
  706. char sect_found = 0;
  707. /* Check if Flash is (sufficiently) erased */
  708. switch (info->portwidth) {
  709. case FLASH_CFI_8BIT:
  710. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  711. break;
  712. case FLASH_CFI_16BIT:
  713. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  714. break;
  715. case FLASH_CFI_32BIT:
  716. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  717. break;
  718. case FLASH_CFI_64BIT:
  719. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  720. break;
  721. default:
  722. flag = 0;
  723. break;
  724. }
  725. if (!flag)
  726. return ERR_NOT_ERASED;
  727. /* Disable interrupts which might cause a timeout here */
  728. flag = disable_interrupts ();
  729. switch (info->vendor) {
  730. case CFI_CMDSET_INTEL_PROG_REGIONS:
  731. case CFI_CMDSET_INTEL_EXTENDED:
  732. case CFI_CMDSET_INTEL_STANDARD:
  733. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  734. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  735. break;
  736. case CFI_CMDSET_AMD_EXTENDED:
  737. case CFI_CMDSET_AMD_STANDARD:
  738. sect = find_sector(info, dest);
  739. flash_unlock_seq (info, sect);
  740. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  741. sect_found = 1;
  742. break;
  743. #ifdef CONFIG_FLASH_CFI_LEGACY
  744. case CFI_CMDSET_AMD_LEGACY:
  745. sect = find_sector(info, dest);
  746. flash_unlock_seq (info, 0);
  747. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  748. sect_found = 1;
  749. break;
  750. #endif
  751. }
  752. switch (info->portwidth) {
  753. case FLASH_CFI_8BIT:
  754. flash_write8(cword.c, dstaddr);
  755. break;
  756. case FLASH_CFI_16BIT:
  757. flash_write16(cword.w, dstaddr);
  758. break;
  759. case FLASH_CFI_32BIT:
  760. flash_write32(cword.l, dstaddr);
  761. break;
  762. case FLASH_CFI_64BIT:
  763. flash_write64(cword.ll, dstaddr);
  764. break;
  765. }
  766. /* re-enable interrupts if necessary */
  767. if (flag)
  768. enable_interrupts ();
  769. if (!sect_found)
  770. sect = find_sector (info, dest);
  771. if (use_flash_status_poll(info))
  772. return flash_status_poll(info, &cword, dstaddr,
  773. info->write_tout, "write");
  774. else
  775. return flash_full_status_check(info, sect,
  776. info->write_tout, "write");
  777. }
  778. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  779. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  780. int len)
  781. {
  782. flash_sect_t sector;
  783. int cnt;
  784. int retcode;
  785. void *src = cp;
  786. void *dst = (void *)dest;
  787. void *dst2 = dst;
  788. int flag = 1;
  789. uint offset = 0;
  790. unsigned int shift;
  791. uchar write_cmd;
  792. switch (info->portwidth) {
  793. case FLASH_CFI_8BIT:
  794. shift = 0;
  795. break;
  796. case FLASH_CFI_16BIT:
  797. shift = 1;
  798. break;
  799. case FLASH_CFI_32BIT:
  800. shift = 2;
  801. break;
  802. case FLASH_CFI_64BIT:
  803. shift = 3;
  804. break;
  805. default:
  806. retcode = ERR_INVAL;
  807. goto out_unmap;
  808. }
  809. cnt = len >> shift;
  810. while ((cnt-- > 0) && (flag == 1)) {
  811. switch (info->portwidth) {
  812. case FLASH_CFI_8BIT:
  813. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  814. flash_read8(src));
  815. src += 1, dst2 += 1;
  816. break;
  817. case FLASH_CFI_16BIT:
  818. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  819. flash_read16(src));
  820. src += 2, dst2 += 2;
  821. break;
  822. case FLASH_CFI_32BIT:
  823. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  824. flash_read32(src));
  825. src += 4, dst2 += 4;
  826. break;
  827. case FLASH_CFI_64BIT:
  828. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  829. flash_read64(src));
  830. src += 8, dst2 += 8;
  831. break;
  832. }
  833. }
  834. if (!flag) {
  835. retcode = ERR_NOT_ERASED;
  836. goto out_unmap;
  837. }
  838. src = cp;
  839. sector = find_sector (info, dest);
  840. switch (info->vendor) {
  841. case CFI_CMDSET_INTEL_PROG_REGIONS:
  842. case CFI_CMDSET_INTEL_STANDARD:
  843. case CFI_CMDSET_INTEL_EXTENDED:
  844. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  845. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  846. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  847. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  848. flash_write_cmd (info, sector, 0, write_cmd);
  849. retcode = flash_status_check (info, sector,
  850. info->buffer_write_tout,
  851. "write to buffer");
  852. if (retcode == ERR_OK) {
  853. /* reduce the number of loops by the width of
  854. * the port */
  855. cnt = len >> shift;
  856. flash_write_cmd (info, sector, 0, cnt - 1);
  857. while (cnt-- > 0) {
  858. switch (info->portwidth) {
  859. case FLASH_CFI_8BIT:
  860. flash_write8(flash_read8(src), dst);
  861. src += 1, dst += 1;
  862. break;
  863. case FLASH_CFI_16BIT:
  864. flash_write16(flash_read16(src), dst);
  865. src += 2, dst += 2;
  866. break;
  867. case FLASH_CFI_32BIT:
  868. flash_write32(flash_read32(src), dst);
  869. src += 4, dst += 4;
  870. break;
  871. case FLASH_CFI_64BIT:
  872. flash_write64(flash_read64(src), dst);
  873. src += 8, dst += 8;
  874. break;
  875. default:
  876. retcode = ERR_INVAL;
  877. goto out_unmap;
  878. }
  879. }
  880. flash_write_cmd (info, sector, 0,
  881. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  882. retcode = flash_full_status_check (
  883. info, sector, info->buffer_write_tout,
  884. "buffer write");
  885. }
  886. break;
  887. case CFI_CMDSET_AMD_STANDARD:
  888. case CFI_CMDSET_AMD_EXTENDED:
  889. flash_unlock_seq(info,0);
  890. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  891. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  892. #endif
  893. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  894. cnt = len >> shift;
  895. flash_write_cmd(info, sector, offset, cnt - 1);
  896. switch (info->portwidth) {
  897. case FLASH_CFI_8BIT:
  898. while (cnt-- > 0) {
  899. flash_write8(flash_read8(src), dst);
  900. src += 1, dst += 1;
  901. }
  902. break;
  903. case FLASH_CFI_16BIT:
  904. while (cnt-- > 0) {
  905. flash_write16(flash_read16(src), dst);
  906. src += 2, dst += 2;
  907. }
  908. break;
  909. case FLASH_CFI_32BIT:
  910. while (cnt-- > 0) {
  911. flash_write32(flash_read32(src), dst);
  912. src += 4, dst += 4;
  913. }
  914. break;
  915. case FLASH_CFI_64BIT:
  916. while (cnt-- > 0) {
  917. flash_write64(flash_read64(src), dst);
  918. src += 8, dst += 8;
  919. }
  920. break;
  921. default:
  922. retcode = ERR_INVAL;
  923. goto out_unmap;
  924. }
  925. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  926. if (use_flash_status_poll(info))
  927. retcode = flash_status_poll(info, src - (1 << shift),
  928. dst - (1 << shift),
  929. info->buffer_write_tout,
  930. "buffer write");
  931. else
  932. retcode = flash_full_status_check(info, sector,
  933. info->buffer_write_tout,
  934. "buffer write");
  935. break;
  936. default:
  937. debug ("Unknown Command Set\n");
  938. retcode = ERR_INVAL;
  939. break;
  940. }
  941. out_unmap:
  942. return retcode;
  943. }
  944. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  945. /*-----------------------------------------------------------------------
  946. */
  947. int flash_erase (flash_info_t * info, int s_first, int s_last)
  948. {
  949. int rcode = 0;
  950. int prot;
  951. flash_sect_t sect;
  952. int st;
  953. if (info->flash_id != FLASH_MAN_CFI) {
  954. puts ("Can't erase unknown flash type - aborted\n");
  955. return 1;
  956. }
  957. if ((s_first < 0) || (s_first > s_last)) {
  958. puts ("- no sectors to erase\n");
  959. return 1;
  960. }
  961. prot = 0;
  962. for (sect = s_first; sect <= s_last; ++sect) {
  963. if (info->protect[sect]) {
  964. prot++;
  965. }
  966. }
  967. if (prot) {
  968. printf ("- Warning: %d protected sectors will not be erased!\n",
  969. prot);
  970. } else if (flash_verbose) {
  971. putc ('\n');
  972. }
  973. for (sect = s_first; sect <= s_last; sect++) {
  974. if (ctrlc()) {
  975. printf("\n");
  976. return 1;
  977. }
  978. if (info->protect[sect] == 0) { /* not protected */
  979. #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
  980. int k;
  981. int size;
  982. int erased;
  983. u32 *flash;
  984. /*
  985. * Check if whole sector is erased
  986. */
  987. size = flash_sector_size(info, sect);
  988. erased = 1;
  989. flash = (u32 *)info->start[sect];
  990. /* divide by 4 for longword access */
  991. size = size >> 2;
  992. for (k = 0; k < size; k++) {
  993. if (flash_read32(flash++) != 0xffffffff) {
  994. erased = 0;
  995. break;
  996. }
  997. }
  998. if (erased) {
  999. if (flash_verbose)
  1000. putc(',');
  1001. continue;
  1002. }
  1003. #endif
  1004. switch (info->vendor) {
  1005. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1006. case CFI_CMDSET_INTEL_STANDARD:
  1007. case CFI_CMDSET_INTEL_EXTENDED:
  1008. flash_write_cmd (info, sect, 0,
  1009. FLASH_CMD_CLEAR_STATUS);
  1010. flash_write_cmd (info, sect, 0,
  1011. FLASH_CMD_BLOCK_ERASE);
  1012. flash_write_cmd (info, sect, 0,
  1013. FLASH_CMD_ERASE_CONFIRM);
  1014. break;
  1015. case CFI_CMDSET_AMD_STANDARD:
  1016. case CFI_CMDSET_AMD_EXTENDED:
  1017. flash_unlock_seq (info, sect);
  1018. flash_write_cmd (info, sect,
  1019. info->addr_unlock1,
  1020. AMD_CMD_ERASE_START);
  1021. flash_unlock_seq (info, sect);
  1022. flash_write_cmd (info, sect, 0,
  1023. info->cmd_erase_sector);
  1024. break;
  1025. #ifdef CONFIG_FLASH_CFI_LEGACY
  1026. case CFI_CMDSET_AMD_LEGACY:
  1027. flash_unlock_seq (info, 0);
  1028. flash_write_cmd (info, 0, info->addr_unlock1,
  1029. AMD_CMD_ERASE_START);
  1030. flash_unlock_seq (info, 0);
  1031. flash_write_cmd (info, sect, 0,
  1032. AMD_CMD_ERASE_SECTOR);
  1033. break;
  1034. #endif
  1035. default:
  1036. debug ("Unkown flash vendor %d\n",
  1037. info->vendor);
  1038. break;
  1039. }
  1040. if (use_flash_status_poll(info)) {
  1041. cfiword_t cword;
  1042. void *dest;
  1043. cword.ll = 0xffffffffffffffffULL;
  1044. dest = flash_map(info, sect, 0);
  1045. st = flash_status_poll(info, &cword, dest,
  1046. info->erase_blk_tout, "erase");
  1047. flash_unmap(info, sect, 0, dest);
  1048. } else
  1049. st = flash_full_status_check(info, sect,
  1050. info->erase_blk_tout,
  1051. "erase");
  1052. if (st)
  1053. rcode = 1;
  1054. else if (flash_verbose)
  1055. putc ('.');
  1056. }
  1057. }
  1058. if (flash_verbose)
  1059. puts (" done\n");
  1060. return rcode;
  1061. }
  1062. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1063. static int sector_erased(flash_info_t *info, int i)
  1064. {
  1065. int k;
  1066. int size;
  1067. u32 *flash;
  1068. /*
  1069. * Check if whole sector is erased
  1070. */
  1071. size = flash_sector_size(info, i);
  1072. flash = (u32 *)info->start[i];
  1073. /* divide by 4 for longword access */
  1074. size = size >> 2;
  1075. for (k = 0; k < size; k++) {
  1076. if (flash_read32(flash++) != 0xffffffff)
  1077. return 0; /* not erased */
  1078. }
  1079. return 1; /* erased */
  1080. }
  1081. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1082. void flash_print_info (flash_info_t * info)
  1083. {
  1084. int i;
  1085. if (info->flash_id != FLASH_MAN_CFI) {
  1086. puts ("missing or unknown FLASH type\n");
  1087. return;
  1088. }
  1089. printf ("%s flash (%d x %d)",
  1090. info->name,
  1091. (info->portwidth << 3), (info->chipwidth << 3));
  1092. if (info->size < 1024*1024)
  1093. printf (" Size: %ld kB in %d Sectors\n",
  1094. info->size >> 10, info->sector_count);
  1095. else
  1096. printf (" Size: %ld MB in %d Sectors\n",
  1097. info->size >> 20, info->sector_count);
  1098. printf (" ");
  1099. switch (info->vendor) {
  1100. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1101. printf ("Intel Prog Regions");
  1102. break;
  1103. case CFI_CMDSET_INTEL_STANDARD:
  1104. printf ("Intel Standard");
  1105. break;
  1106. case CFI_CMDSET_INTEL_EXTENDED:
  1107. printf ("Intel Extended");
  1108. break;
  1109. case CFI_CMDSET_AMD_STANDARD:
  1110. printf ("AMD Standard");
  1111. break;
  1112. case CFI_CMDSET_AMD_EXTENDED:
  1113. printf ("AMD Extended");
  1114. break;
  1115. #ifdef CONFIG_FLASH_CFI_LEGACY
  1116. case CFI_CMDSET_AMD_LEGACY:
  1117. printf ("AMD Legacy");
  1118. break;
  1119. #endif
  1120. default:
  1121. printf ("Unknown (%d)", info->vendor);
  1122. break;
  1123. }
  1124. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1125. info->manufacturer_id);
  1126. printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1127. info->device_id);
  1128. if ((info->device_id & 0xff) == 0x7E) {
  1129. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1130. info->device_id2);
  1131. }
  1132. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1133. info->erase_blk_tout,
  1134. info->write_tout);
  1135. if (info->buffer_size > 1) {
  1136. printf (" Buffer write timeout: %ld ms, "
  1137. "buffer size: %d bytes\n",
  1138. info->buffer_write_tout,
  1139. info->buffer_size);
  1140. }
  1141. puts ("\n Sector Start Addresses:");
  1142. for (i = 0; i < info->sector_count; ++i) {
  1143. if (ctrlc())
  1144. break;
  1145. if ((i % 5) == 0)
  1146. putc('\n');
  1147. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1148. /* print empty and read-only info */
  1149. printf (" %08lX %c %s ",
  1150. info->start[i],
  1151. sector_erased(info, i) ? 'E' : ' ',
  1152. info->protect[i] ? "RO" : " ");
  1153. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1154. printf (" %08lX %s ",
  1155. info->start[i],
  1156. info->protect[i] ? "RO" : " ");
  1157. #endif
  1158. }
  1159. putc ('\n');
  1160. return;
  1161. }
  1162. /*-----------------------------------------------------------------------
  1163. * This is used in a few places in write_buf() to show programming
  1164. * progress. Making it a function is nasty because it needs to do side
  1165. * effect updates to digit and dots. Repeated code is nasty too, so
  1166. * we define it once here.
  1167. */
  1168. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1169. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1170. if (flash_verbose) { \
  1171. dots -= dots_sub; \
  1172. if ((scale > 0) && (dots <= 0)) { \
  1173. if ((digit % 5) == 0) \
  1174. printf ("%d", digit / 5); \
  1175. else \
  1176. putc ('.'); \
  1177. digit--; \
  1178. dots += scale; \
  1179. } \
  1180. }
  1181. #else
  1182. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1183. #endif
  1184. /*-----------------------------------------------------------------------
  1185. * Copy memory to flash, returns:
  1186. * 0 - OK
  1187. * 1 - write timeout
  1188. * 2 - Flash not erased
  1189. */
  1190. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1191. {
  1192. ulong wp;
  1193. uchar *p;
  1194. int aln;
  1195. cfiword_t cword;
  1196. int i, rc;
  1197. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1198. int buffered_size;
  1199. #endif
  1200. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1201. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1202. int scale = 0;
  1203. int dots = 0;
  1204. /*
  1205. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1206. */
  1207. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1208. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1209. CONFIG_FLASH_SHOW_PROGRESS);
  1210. }
  1211. #endif
  1212. /* get lower aligned address */
  1213. wp = (addr & ~(info->portwidth - 1));
  1214. /* handle unaligned start */
  1215. if ((aln = addr - wp) != 0) {
  1216. cword.l = 0;
  1217. p = (uchar *)wp;
  1218. for (i = 0; i < aln; ++i)
  1219. flash_add_byte (info, &cword, flash_read8(p + i));
  1220. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1221. flash_add_byte (info, &cword, *src++);
  1222. cnt--;
  1223. }
  1224. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1225. flash_add_byte (info, &cword, flash_read8(p + i));
  1226. rc = flash_write_cfiword (info, wp, cword);
  1227. if (rc != 0)
  1228. return rc;
  1229. wp += i;
  1230. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1231. }
  1232. /* handle the aligned part */
  1233. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1234. buffered_size = (info->portwidth / info->chipwidth);
  1235. buffered_size *= info->buffer_size;
  1236. while (cnt >= info->portwidth) {
  1237. /* prohibit buffer write when buffer_size is 1 */
  1238. if (info->buffer_size == 1) {
  1239. cword.l = 0;
  1240. for (i = 0; i < info->portwidth; i++)
  1241. flash_add_byte (info, &cword, *src++);
  1242. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1243. return rc;
  1244. wp += info->portwidth;
  1245. cnt -= info->portwidth;
  1246. continue;
  1247. }
  1248. /* write buffer until next buffered_size aligned boundary */
  1249. i = buffered_size - (wp % buffered_size);
  1250. if (i > cnt)
  1251. i = cnt;
  1252. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1253. return rc;
  1254. i -= i & (info->portwidth - 1);
  1255. wp += i;
  1256. src += i;
  1257. cnt -= i;
  1258. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1259. /* Only check every once in a while */
  1260. if ((cnt & 0xFFFF) < buffered_size && ctrlc())
  1261. return ERR_ABORTED;
  1262. }
  1263. #else
  1264. while (cnt >= info->portwidth) {
  1265. cword.l = 0;
  1266. for (i = 0; i < info->portwidth; i++) {
  1267. flash_add_byte (info, &cword, *src++);
  1268. }
  1269. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1270. return rc;
  1271. wp += info->portwidth;
  1272. cnt -= info->portwidth;
  1273. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1274. /* Only check every once in a while */
  1275. if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
  1276. return ERR_ABORTED;
  1277. }
  1278. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1279. if (cnt == 0) {
  1280. return (0);
  1281. }
  1282. /*
  1283. * handle unaligned tail bytes
  1284. */
  1285. cword.l = 0;
  1286. p = (uchar *)wp;
  1287. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1288. flash_add_byte (info, &cword, *src++);
  1289. --cnt;
  1290. }
  1291. for (; i < info->portwidth; ++i)
  1292. flash_add_byte (info, &cword, flash_read8(p + i));
  1293. return flash_write_cfiword (info, wp, cword);
  1294. }
  1295. static inline int manufact_match(flash_info_t *info, u32 manu)
  1296. {
  1297. return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
  1298. }
  1299. /*-----------------------------------------------------------------------
  1300. */
  1301. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1302. static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
  1303. {
  1304. if (manufact_match(info, INTEL_MANUFACT)
  1305. && info->device_id == NUMONYX_256MBIT) {
  1306. /*
  1307. * see errata called
  1308. * "Numonyx Axcell P33/P30 Specification Update" :)
  1309. */
  1310. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
  1311. if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
  1312. prot)) {
  1313. /*
  1314. * cmd must come before FLASH_CMD_PROTECT + 20us
  1315. * Disable interrupts which might cause a timeout here.
  1316. */
  1317. int flag = disable_interrupts();
  1318. unsigned short cmd;
  1319. if (prot)
  1320. cmd = FLASH_CMD_PROTECT_SET;
  1321. else
  1322. cmd = FLASH_CMD_PROTECT_CLEAR;
  1323. flash_write_cmd(info, sector, 0,
  1324. FLASH_CMD_PROTECT);
  1325. flash_write_cmd(info, sector, 0, cmd);
  1326. /* re-enable interrupts if necessary */
  1327. if (flag)
  1328. enable_interrupts();
  1329. }
  1330. return 1;
  1331. }
  1332. return 0;
  1333. }
  1334. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1335. {
  1336. int retcode = 0;
  1337. switch (info->vendor) {
  1338. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1339. case CFI_CMDSET_INTEL_STANDARD:
  1340. case CFI_CMDSET_INTEL_EXTENDED:
  1341. if (!cfi_protect_bugfix(info, sector, prot)) {
  1342. flash_write_cmd(info, sector, 0,
  1343. FLASH_CMD_CLEAR_STATUS);
  1344. flash_write_cmd(info, sector, 0,
  1345. FLASH_CMD_PROTECT);
  1346. if (prot)
  1347. flash_write_cmd(info, sector, 0,
  1348. FLASH_CMD_PROTECT_SET);
  1349. else
  1350. flash_write_cmd(info, sector, 0,
  1351. FLASH_CMD_PROTECT_CLEAR);
  1352. }
  1353. break;
  1354. case CFI_CMDSET_AMD_EXTENDED:
  1355. case CFI_CMDSET_AMD_STANDARD:
  1356. /* U-Boot only checks the first byte */
  1357. if (manufact_match(info, ATM_MANUFACT)) {
  1358. if (prot) {
  1359. flash_unlock_seq (info, 0);
  1360. flash_write_cmd (info, 0,
  1361. info->addr_unlock1,
  1362. ATM_CMD_SOFTLOCK_START);
  1363. flash_unlock_seq (info, 0);
  1364. flash_write_cmd (info, sector, 0,
  1365. ATM_CMD_LOCK_SECT);
  1366. } else {
  1367. flash_write_cmd (info, 0,
  1368. info->addr_unlock1,
  1369. AMD_CMD_UNLOCK_START);
  1370. if (info->device_id == ATM_ID_BV6416)
  1371. flash_write_cmd (info, sector,
  1372. 0, ATM_CMD_UNLOCK_SECT);
  1373. }
  1374. }
  1375. if (manufact_match(info, AMD_MANUFACT)) {
  1376. int flag = disable_interrupts();
  1377. int lock_flag;
  1378. flash_unlock_seq(info, 0);
  1379. flash_write_cmd(info, 0, info->addr_unlock1,
  1380. AMD_CMD_SET_PPB_ENTRY);
  1381. lock_flag = flash_isset(info, sector, 0, 0x01);
  1382. if (prot) {
  1383. if (lock_flag) {
  1384. flash_write_cmd(info, sector, 0,
  1385. AMD_CMD_PPB_LOCK_BC1);
  1386. flash_write_cmd(info, sector, 0,
  1387. AMD_CMD_PPB_LOCK_BC2);
  1388. }
  1389. debug("sector %ld %slocked\n", sector,
  1390. lock_flag ? "" : "already ");
  1391. } else {
  1392. if (!lock_flag) {
  1393. debug("unlock %ld\n", sector);
  1394. flash_write_cmd(info, 0, 0,
  1395. AMD_CMD_PPB_UNLOCK_BC1);
  1396. flash_write_cmd(info, 0, 0,
  1397. AMD_CMD_PPB_UNLOCK_BC2);
  1398. }
  1399. debug("sector %ld %sunlocked\n", sector,
  1400. !lock_flag ? "" : "already ");
  1401. }
  1402. if (flag)
  1403. enable_interrupts();
  1404. if (flash_status_check(info, sector,
  1405. info->erase_blk_tout,
  1406. prot ? "protect" : "unprotect"))
  1407. printf("status check error\n");
  1408. flash_write_cmd(info, 0, 0,
  1409. AMD_CMD_SET_PPB_EXIT_BC1);
  1410. flash_write_cmd(info, 0, 0,
  1411. AMD_CMD_SET_PPB_EXIT_BC2);
  1412. }
  1413. break;
  1414. #ifdef CONFIG_FLASH_CFI_LEGACY
  1415. case CFI_CMDSET_AMD_LEGACY:
  1416. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1417. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1418. if (prot)
  1419. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1420. else
  1421. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1422. #endif
  1423. };
  1424. /*
  1425. * Flash needs to be in status register read mode for
  1426. * flash_full_status_check() to work correctly
  1427. */
  1428. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  1429. if ((retcode =
  1430. flash_full_status_check (info, sector, info->erase_blk_tout,
  1431. prot ? "protect" : "unprotect")) == 0) {
  1432. info->protect[sector] = prot;
  1433. /*
  1434. * On some of Intel's flash chips (marked via legacy_unlock)
  1435. * unprotect unprotects all locking.
  1436. */
  1437. if ((prot == 0) && (info->legacy_unlock)) {
  1438. flash_sect_t i;
  1439. for (i = 0; i < info->sector_count; i++) {
  1440. if (info->protect[i])
  1441. flash_real_protect (info, i, 1);
  1442. }
  1443. }
  1444. }
  1445. return retcode;
  1446. }
  1447. /*-----------------------------------------------------------------------
  1448. * flash_read_user_serial - read the OneTimeProgramming cells
  1449. */
  1450. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1451. int len)
  1452. {
  1453. uchar *src;
  1454. uchar *dst;
  1455. dst = buffer;
  1456. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1457. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1458. memcpy (dst, src + offset, len);
  1459. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1460. udelay(1);
  1461. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1462. }
  1463. /*
  1464. * flash_read_factory_serial - read the device Id from the protection area
  1465. */
  1466. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1467. int len)
  1468. {
  1469. uchar *src;
  1470. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1471. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1472. memcpy (buffer, src + offset, len);
  1473. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1474. udelay(1);
  1475. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1476. }
  1477. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1478. /*-----------------------------------------------------------------------
  1479. * Reverse the order of the erase regions in the CFI QRY structure.
  1480. * This is needed for chips that are either a) correctly detected as
  1481. * top-boot, or b) buggy.
  1482. */
  1483. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1484. {
  1485. unsigned int i, j;
  1486. u32 tmp;
  1487. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1488. tmp = qry->erase_region_info[i];
  1489. qry->erase_region_info[i] = qry->erase_region_info[j];
  1490. qry->erase_region_info[j] = tmp;
  1491. }
  1492. }
  1493. /*-----------------------------------------------------------------------
  1494. * read jedec ids from device and set corresponding fields in info struct
  1495. *
  1496. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1497. *
  1498. */
  1499. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1500. {
  1501. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1502. udelay(1);
  1503. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1504. udelay(1000); /* some flash are slow to respond */
  1505. info->manufacturer_id = flash_read_uchar (info,
  1506. FLASH_OFFSET_MANUFACTURER_ID);
  1507. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1508. flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
  1509. flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
  1510. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1511. }
  1512. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1513. {
  1514. info->cmd_reset = FLASH_CMD_RESET;
  1515. cmdset_intel_read_jedec_ids(info);
  1516. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1517. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1518. /* read legacy lock/unlock bit from intel flash */
  1519. if (info->ext_addr) {
  1520. info->legacy_unlock = flash_read_uchar (info,
  1521. info->ext_addr + 5) & 0x08;
  1522. }
  1523. #endif
  1524. return 0;
  1525. }
  1526. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1527. {
  1528. ushort bankId = 0;
  1529. uchar manuId;
  1530. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1531. flash_unlock_seq(info, 0);
  1532. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1533. udelay(1000); /* some flash are slow to respond */
  1534. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1535. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1536. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1537. bankId += 0x100;
  1538. manuId = flash_read_uchar (info,
  1539. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1540. }
  1541. info->manufacturer_id = manuId;
  1542. switch (info->chipwidth){
  1543. case FLASH_CFI_8BIT:
  1544. info->device_id = flash_read_uchar (info,
  1545. FLASH_OFFSET_DEVICE_ID);
  1546. if (info->device_id == 0x7E) {
  1547. /* AMD 3-byte (expanded) device ids */
  1548. info->device_id2 = flash_read_uchar (info,
  1549. FLASH_OFFSET_DEVICE_ID2);
  1550. info->device_id2 <<= 8;
  1551. info->device_id2 |= flash_read_uchar (info,
  1552. FLASH_OFFSET_DEVICE_ID3);
  1553. }
  1554. break;
  1555. case FLASH_CFI_16BIT:
  1556. info->device_id = flash_read_word (info,
  1557. FLASH_OFFSET_DEVICE_ID);
  1558. if ((info->device_id & 0xff) == 0x7E) {
  1559. /* AMD 3-byte (expanded) device ids */
  1560. info->device_id2 = flash_read_uchar (info,
  1561. FLASH_OFFSET_DEVICE_ID2);
  1562. info->device_id2 <<= 8;
  1563. info->device_id2 |= flash_read_uchar (info,
  1564. FLASH_OFFSET_DEVICE_ID3);
  1565. }
  1566. break;
  1567. default:
  1568. break;
  1569. }
  1570. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1571. udelay(1);
  1572. }
  1573. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1574. {
  1575. info->cmd_reset = AMD_CMD_RESET;
  1576. info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
  1577. cmdset_amd_read_jedec_ids(info);
  1578. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1579. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1580. if (info->ext_addr && manufact_match(info, AMD_MANUFACT)) {
  1581. ushort spus;
  1582. /* read sector protect/unprotect scheme */
  1583. spus = flash_read_uchar(info, info->ext_addr + 9);
  1584. if (spus == 0x8)
  1585. info->legacy_unlock = 1;
  1586. }
  1587. #endif
  1588. return 0;
  1589. }
  1590. #ifdef CONFIG_FLASH_CFI_LEGACY
  1591. static void flash_read_jedec_ids (flash_info_t * info)
  1592. {
  1593. info->manufacturer_id = 0;
  1594. info->device_id = 0;
  1595. info->device_id2 = 0;
  1596. switch (info->vendor) {
  1597. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1598. case CFI_CMDSET_INTEL_STANDARD:
  1599. case CFI_CMDSET_INTEL_EXTENDED:
  1600. cmdset_intel_read_jedec_ids(info);
  1601. break;
  1602. case CFI_CMDSET_AMD_STANDARD:
  1603. case CFI_CMDSET_AMD_EXTENDED:
  1604. cmdset_amd_read_jedec_ids(info);
  1605. break;
  1606. default:
  1607. break;
  1608. }
  1609. }
  1610. /*-----------------------------------------------------------------------
  1611. * Call board code to request info about non-CFI flash.
  1612. * board_flash_get_legacy needs to fill in at least:
  1613. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1614. */
  1615. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1616. {
  1617. flash_info_t *info = &flash_info[banknum];
  1618. if (board_flash_get_legacy(base, banknum, info)) {
  1619. /* board code may have filled info completely. If not, we
  1620. use JEDEC ID probing. */
  1621. if (!info->vendor) {
  1622. int modes[] = {
  1623. CFI_CMDSET_AMD_STANDARD,
  1624. CFI_CMDSET_INTEL_STANDARD
  1625. };
  1626. int i;
  1627. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1628. info->vendor = modes[i];
  1629. info->start[0] =
  1630. (ulong)map_physmem(base,
  1631. info->portwidth,
  1632. MAP_NOCACHE);
  1633. if (info->portwidth == FLASH_CFI_8BIT
  1634. && info->interface == FLASH_CFI_X8X16) {
  1635. info->addr_unlock1 = 0x2AAA;
  1636. info->addr_unlock2 = 0x5555;
  1637. } else {
  1638. info->addr_unlock1 = 0x5555;
  1639. info->addr_unlock2 = 0x2AAA;
  1640. }
  1641. flash_read_jedec_ids(info);
  1642. debug("JEDEC PROBE: ID %x %x %x\n",
  1643. info->manufacturer_id,
  1644. info->device_id,
  1645. info->device_id2);
  1646. if (jedec_flash_match(info, info->start[0]))
  1647. break;
  1648. else
  1649. unmap_physmem((void *)info->start[0],
  1650. MAP_NOCACHE);
  1651. }
  1652. }
  1653. switch(info->vendor) {
  1654. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1655. case CFI_CMDSET_INTEL_STANDARD:
  1656. case CFI_CMDSET_INTEL_EXTENDED:
  1657. info->cmd_reset = FLASH_CMD_RESET;
  1658. break;
  1659. case CFI_CMDSET_AMD_STANDARD:
  1660. case CFI_CMDSET_AMD_EXTENDED:
  1661. case CFI_CMDSET_AMD_LEGACY:
  1662. info->cmd_reset = AMD_CMD_RESET;
  1663. break;
  1664. }
  1665. info->flash_id = FLASH_MAN_CFI;
  1666. return 1;
  1667. }
  1668. return 0; /* use CFI */
  1669. }
  1670. #else
  1671. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1672. {
  1673. return 0; /* use CFI */
  1674. }
  1675. #endif
  1676. /*-----------------------------------------------------------------------
  1677. * detect if flash is compatible with the Common Flash Interface (CFI)
  1678. * http://www.jedec.org/download/search/jesd68.pdf
  1679. */
  1680. static void flash_read_cfi (flash_info_t *info, void *buf,
  1681. unsigned int start, size_t len)
  1682. {
  1683. u8 *p = buf;
  1684. unsigned int i;
  1685. for (i = 0; i < len; i++)
  1686. p[i] = flash_read_uchar(info, start + i);
  1687. }
  1688. static void __flash_cmd_reset(flash_info_t *info)
  1689. {
  1690. /*
  1691. * We do not yet know what kind of commandset to use, so we issue
  1692. * the reset command in both Intel and AMD variants, in the hope
  1693. * that AMD flash roms ignore the Intel command.
  1694. */
  1695. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1696. udelay(1);
  1697. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1698. }
  1699. void flash_cmd_reset(flash_info_t *info)
  1700. __attribute__((weak,alias("__flash_cmd_reset")));
  1701. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1702. {
  1703. int cfi_offset;
  1704. /* Issue FLASH reset command */
  1705. flash_cmd_reset(info);
  1706. for (cfi_offset=0;
  1707. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1708. cfi_offset++) {
  1709. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1710. FLASH_CMD_CFI);
  1711. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1712. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1713. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1714. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1715. sizeof(struct cfi_qry));
  1716. info->interface = le16_to_cpu(qry->interface_desc);
  1717. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1718. debug ("device interface is %d\n",
  1719. info->interface);
  1720. debug ("found port %d chip %d ",
  1721. info->portwidth, info->chipwidth);
  1722. debug ("port %d bits chip %d bits\n",
  1723. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1724. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1725. /* calculate command offsets as in the Linux driver */
  1726. info->addr_unlock1 = 0x555;
  1727. info->addr_unlock2 = 0x2aa;
  1728. /*
  1729. * modify the unlock address if we are
  1730. * in compatibility mode
  1731. */
  1732. if ( /* x8/x16 in x8 mode */
  1733. ((info->chipwidth == FLASH_CFI_BY8) &&
  1734. (info->interface == FLASH_CFI_X8X16)) ||
  1735. /* x16/x32 in x16 mode */
  1736. ((info->chipwidth == FLASH_CFI_BY16) &&
  1737. (info->interface == FLASH_CFI_X16X32)))
  1738. {
  1739. info->addr_unlock1 = 0xaaa;
  1740. info->addr_unlock2 = 0x555;
  1741. }
  1742. info->name = "CFI conformant";
  1743. return 1;
  1744. }
  1745. }
  1746. return 0;
  1747. }
  1748. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1749. {
  1750. debug ("flash detect cfi\n");
  1751. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1752. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1753. for (info->chipwidth = FLASH_CFI_BY8;
  1754. info->chipwidth <= info->portwidth;
  1755. info->chipwidth <<= 1)
  1756. if (__flash_detect_cfi(info, qry))
  1757. return 1;
  1758. }
  1759. debug ("not found\n");
  1760. return 0;
  1761. }
  1762. /*
  1763. * Manufacturer-specific quirks. Add workarounds for geometry
  1764. * reversal, etc. here.
  1765. */
  1766. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1767. {
  1768. /* check if flash geometry needs reversal */
  1769. if (qry->num_erase_regions > 1) {
  1770. /* reverse geometry if top boot part */
  1771. if (info->cfi_version < 0x3131) {
  1772. /* CFI < 1.1, try to guess from device id */
  1773. if ((info->device_id & 0x80) != 0)
  1774. cfi_reverse_geometry(qry);
  1775. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1776. /* CFI >= 1.1, deduct from top/bottom flag */
  1777. /* note: ext_addr is valid since cfi_version > 0 */
  1778. cfi_reverse_geometry(qry);
  1779. }
  1780. }
  1781. }
  1782. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1783. {
  1784. int reverse_geometry = 0;
  1785. /* Check the "top boot" bit in the PRI */
  1786. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1787. reverse_geometry = 1;
  1788. /* AT49BV6416(T) list the erase regions in the wrong order.
  1789. * However, the device ID is identical with the non-broken
  1790. * AT49BV642D they differ in the high byte.
  1791. */
  1792. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1793. reverse_geometry = !reverse_geometry;
  1794. if (reverse_geometry)
  1795. cfi_reverse_geometry(qry);
  1796. }
  1797. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1798. {
  1799. /* check if flash geometry needs reversal */
  1800. if (qry->num_erase_regions > 1) {
  1801. /* reverse geometry if top boot part */
  1802. if (info->cfi_version < 0x3131) {
  1803. /* CFI < 1.1, guess by device id */
  1804. if (info->device_id == 0x22CA || /* M29W320DT */
  1805. info->device_id == 0x2256 || /* M29W320ET */
  1806. info->device_id == 0x22D7) { /* M29W800DT */
  1807. cfi_reverse_geometry(qry);
  1808. }
  1809. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1810. /* CFI >= 1.1, deduct from top/bottom flag */
  1811. /* note: ext_addr is valid since cfi_version > 0 */
  1812. cfi_reverse_geometry(qry);
  1813. }
  1814. }
  1815. }
  1816. static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
  1817. {
  1818. /*
  1819. * SST, for many recent nor parallel flashes, says they are
  1820. * CFI-conformant. This is not true, since qry struct.
  1821. * reports a std. AMD command set (0x0002), while SST allows to
  1822. * erase two different sector sizes for the same memory.
  1823. * 64KB sector (SST call it block) needs 0x30 to be erased.
  1824. * 4KB sector (SST call it sector) needs 0x50 to be erased.
  1825. * Since CFI query detect the 4KB number of sectors, users expects
  1826. * a sector granularity of 4KB, and it is here set.
  1827. */
  1828. if (info->device_id == 0x5D23 || /* SST39VF3201B */
  1829. info->device_id == 0x5C23) { /* SST39VF3202B */
  1830. /* set sector granularity to 4KB */
  1831. info->cmd_erase_sector=0x50;
  1832. }
  1833. }
  1834. /*
  1835. * The following code cannot be run from FLASH!
  1836. *
  1837. */
  1838. ulong flash_get_size (phys_addr_t base, int banknum)
  1839. {
  1840. flash_info_t *info = &flash_info[banknum];
  1841. int i, j;
  1842. flash_sect_t sect_cnt;
  1843. phys_addr_t sector;
  1844. unsigned long tmp;
  1845. int size_ratio;
  1846. uchar num_erase_regions;
  1847. int erase_region_size;
  1848. int erase_region_count;
  1849. struct cfi_qry qry;
  1850. unsigned long max_size;
  1851. memset(&qry, 0, sizeof(qry));
  1852. info->ext_addr = 0;
  1853. info->cfi_version = 0;
  1854. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1855. info->legacy_unlock = 0;
  1856. #endif
  1857. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1858. if (flash_detect_cfi (info, &qry)) {
  1859. info->vendor = le16_to_cpu(qry.p_id);
  1860. info->ext_addr = le16_to_cpu(qry.p_adr);
  1861. num_erase_regions = qry.num_erase_regions;
  1862. if (info->ext_addr) {
  1863. info->cfi_version = (ushort) flash_read_uchar (info,
  1864. info->ext_addr + 3) << 8;
  1865. info->cfi_version |= (ushort) flash_read_uchar (info,
  1866. info->ext_addr + 4);
  1867. }
  1868. #ifdef DEBUG
  1869. flash_printqry (&qry);
  1870. #endif
  1871. switch (info->vendor) {
  1872. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1873. case CFI_CMDSET_INTEL_STANDARD:
  1874. case CFI_CMDSET_INTEL_EXTENDED:
  1875. cmdset_intel_init(info, &qry);
  1876. break;
  1877. case CFI_CMDSET_AMD_STANDARD:
  1878. case CFI_CMDSET_AMD_EXTENDED:
  1879. cmdset_amd_init(info, &qry);
  1880. break;
  1881. default:
  1882. printf("CFI: Unknown command set 0x%x\n",
  1883. info->vendor);
  1884. /*
  1885. * Unfortunately, this means we don't know how
  1886. * to get the chip back to Read mode. Might
  1887. * as well try an Intel-style reset...
  1888. */
  1889. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1890. return 0;
  1891. }
  1892. /* Do manufacturer-specific fixups */
  1893. switch (info->manufacturer_id) {
  1894. case 0x0001: /* AMD */
  1895. case 0x0037: /* AMIC */
  1896. flash_fixup_amd(info, &qry);
  1897. break;
  1898. case 0x001f:
  1899. flash_fixup_atmel(info, &qry);
  1900. break;
  1901. case 0x0020:
  1902. flash_fixup_stm(info, &qry);
  1903. break;
  1904. case 0x00bf: /* SST */
  1905. flash_fixup_sst(info, &qry);
  1906. break;
  1907. }
  1908. debug ("manufacturer is %d\n", info->vendor);
  1909. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1910. debug ("device id is 0x%x\n", info->device_id);
  1911. debug ("device id2 is 0x%x\n", info->device_id2);
  1912. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1913. size_ratio = info->portwidth / info->chipwidth;
  1914. /* if the chip is x8/x16 reduce the ratio by half */
  1915. if ((info->interface == FLASH_CFI_X8X16)
  1916. && (info->chipwidth == FLASH_CFI_BY8)) {
  1917. size_ratio >>= 1;
  1918. }
  1919. debug ("size_ratio %d port %d bits chip %d bits\n",
  1920. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1921. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1922. info->size = 1 << qry.dev_size;
  1923. /* multiply the size by the number of chips */
  1924. info->size *= size_ratio;
  1925. max_size = cfi_flash_bank_size(banknum);
  1926. if (max_size && (info->size > max_size)) {
  1927. debug("[truncated from %ldMiB]", info->size >> 20);
  1928. info->size = max_size;
  1929. }
  1930. debug ("found %d erase regions\n", num_erase_regions);
  1931. sect_cnt = 0;
  1932. sector = base;
  1933. for (i = 0; i < num_erase_regions; i++) {
  1934. if (i > NUM_ERASE_REGIONS) {
  1935. printf ("%d erase regions found, only %d used\n",
  1936. num_erase_regions, NUM_ERASE_REGIONS);
  1937. break;
  1938. }
  1939. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1940. debug("erase region %u: 0x%08lx\n", i, tmp);
  1941. erase_region_count = (tmp & 0xffff) + 1;
  1942. tmp >>= 16;
  1943. erase_region_size =
  1944. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1945. debug ("erase_region_count = %d erase_region_size = %d\n",
  1946. erase_region_count, erase_region_size);
  1947. for (j = 0; j < erase_region_count; j++) {
  1948. if (sector - base >= info->size)
  1949. break;
  1950. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1951. printf("ERROR: too many flash sectors\n");
  1952. break;
  1953. }
  1954. info->start[sect_cnt] =
  1955. (ulong)map_physmem(sector,
  1956. info->portwidth,
  1957. MAP_NOCACHE);
  1958. sector += (erase_region_size * size_ratio);
  1959. /*
  1960. * Only read protection status from
  1961. * supported devices (intel...)
  1962. */
  1963. switch (info->vendor) {
  1964. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1965. case CFI_CMDSET_INTEL_EXTENDED:
  1966. case CFI_CMDSET_INTEL_STANDARD:
  1967. /*
  1968. * Set flash to read-id mode. Otherwise
  1969. * reading protected status is not
  1970. * guaranteed.
  1971. */
  1972. flash_write_cmd(info, sect_cnt, 0,
  1973. FLASH_CMD_READ_ID);
  1974. info->protect[sect_cnt] =
  1975. flash_isset (info, sect_cnt,
  1976. FLASH_OFFSET_PROTECT,
  1977. FLASH_STATUS_PROTECT);
  1978. break;
  1979. case CFI_CMDSET_AMD_EXTENDED:
  1980. case CFI_CMDSET_AMD_STANDARD:
  1981. if (!manufact_match(info, AMD_MANUFACT)) {
  1982. /* default: not protected */
  1983. info->protect[sect_cnt] = 0;
  1984. break;
  1985. }
  1986. /* Read protection (PPB) from sector */
  1987. flash_write_cmd(info, 0, 0,
  1988. info->cmd_reset);
  1989. flash_unlock_seq(info, 0);
  1990. flash_write_cmd(info, 0,
  1991. info->addr_unlock1,
  1992. FLASH_CMD_READ_ID);
  1993. info->protect[sect_cnt] =
  1994. flash_isset(
  1995. info, sect_cnt,
  1996. FLASH_OFFSET_PROTECT,
  1997. FLASH_STATUS_PROTECT);
  1998. break;
  1999. default:
  2000. /* default: not protected */
  2001. info->protect[sect_cnt] = 0;
  2002. }
  2003. sect_cnt++;
  2004. }
  2005. }
  2006. info->sector_count = sect_cnt;
  2007. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  2008. tmp = 1 << qry.block_erase_timeout_typ;
  2009. info->erase_blk_tout = tmp *
  2010. (1 << qry.block_erase_timeout_max);
  2011. tmp = (1 << qry.buf_write_timeout_typ) *
  2012. (1 << qry.buf_write_timeout_max);
  2013. /* round up when converting to ms */
  2014. info->buffer_write_tout = (tmp + 999) / 1000;
  2015. tmp = (1 << qry.word_write_timeout_typ) *
  2016. (1 << qry.word_write_timeout_max);
  2017. /* round up when converting to ms */
  2018. info->write_tout = (tmp + 999) / 1000;
  2019. info->flash_id = FLASH_MAN_CFI;
  2020. if ((info->interface == FLASH_CFI_X8X16) &&
  2021. (info->chipwidth == FLASH_CFI_BY8)) {
  2022. /* XXX - Need to test on x8/x16 in parallel. */
  2023. info->portwidth >>= 1;
  2024. }
  2025. flash_write_cmd (info, 0, 0, info->cmd_reset);
  2026. }
  2027. return (info->size);
  2028. }
  2029. #ifdef CONFIG_FLASH_CFI_MTD
  2030. void flash_set_verbose(uint v)
  2031. {
  2032. flash_verbose = v;
  2033. }
  2034. #endif
  2035. static void cfi_flash_set_config_reg(u32 base, u16 val)
  2036. {
  2037. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  2038. /*
  2039. * Only set this config register if really defined
  2040. * to a valid value (0xffff is invalid)
  2041. */
  2042. if (val == 0xffff)
  2043. return;
  2044. /*
  2045. * Set configuration register. Data is "encrypted" in the 16 lower
  2046. * address bits.
  2047. */
  2048. flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
  2049. flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
  2050. /*
  2051. * Finally issue reset-command to bring device back to
  2052. * read-array mode
  2053. */
  2054. flash_write16(FLASH_CMD_RESET, (void *)base);
  2055. #endif
  2056. }
  2057. /*-----------------------------------------------------------------------
  2058. */
  2059. void flash_protect_default(void)
  2060. {
  2061. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2062. int i;
  2063. struct apl_s {
  2064. ulong start;
  2065. ulong size;
  2066. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  2067. #endif
  2068. /* Monitor protection ON by default */
  2069. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  2070. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  2071. flash_protect(FLAG_PROTECT_SET,
  2072. CONFIG_SYS_MONITOR_BASE,
  2073. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  2074. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  2075. #endif
  2076. /* Environment protection ON by default */
  2077. #ifdef CONFIG_ENV_IS_IN_FLASH
  2078. flash_protect(FLAG_PROTECT_SET,
  2079. CONFIG_ENV_ADDR,
  2080. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  2081. flash_get_info(CONFIG_ENV_ADDR));
  2082. #endif
  2083. /* Redundant environment protection ON by default */
  2084. #ifdef CONFIG_ENV_ADDR_REDUND
  2085. flash_protect(FLAG_PROTECT_SET,
  2086. CONFIG_ENV_ADDR_REDUND,
  2087. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  2088. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  2089. #endif
  2090. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2091. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  2092. debug("autoprotecting from %08lx to %08lx\n",
  2093. apl[i].start, apl[i].start + apl[i].size - 1);
  2094. flash_protect(FLAG_PROTECT_SET,
  2095. apl[i].start,
  2096. apl[i].start + apl[i].size - 1,
  2097. flash_get_info(apl[i].start));
  2098. }
  2099. #endif
  2100. }
  2101. unsigned long flash_init (void)
  2102. {
  2103. unsigned long size = 0;
  2104. int i;
  2105. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2106. /* read environment from EEPROM */
  2107. char s[64];
  2108. getenv_f("unlock", s, sizeof(s));
  2109. #endif
  2110. /* Init: no FLASHes known */
  2111. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  2112. flash_info[i].flash_id = FLASH_UNKNOWN;
  2113. /* Optionally write flash configuration register */
  2114. cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
  2115. cfi_flash_config_reg(i));
  2116. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  2117. flash_get_size(cfi_flash_bank_addr(i), i);
  2118. size += flash_info[i].size;
  2119. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  2120. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  2121. printf ("## Unknown flash on Bank %d "
  2122. "- Size = 0x%08lx = %ld MB\n",
  2123. i+1, flash_info[i].size,
  2124. flash_info[i].size >> 20);
  2125. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  2126. }
  2127. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2128. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  2129. /*
  2130. * Only the U-Boot image and it's environment
  2131. * is protected, all other sectors are
  2132. * unprotected (unlocked) if flash hardware
  2133. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  2134. * and the environment variable "unlock" is
  2135. * set to "yes".
  2136. */
  2137. if (flash_info[i].legacy_unlock) {
  2138. int k;
  2139. /*
  2140. * Disable legacy_unlock temporarily,
  2141. * since flash_real_protect would
  2142. * relock all other sectors again
  2143. * otherwise.
  2144. */
  2145. flash_info[i].legacy_unlock = 0;
  2146. /*
  2147. * Legacy unlocking (e.g. Intel J3) ->
  2148. * unlock only one sector. This will
  2149. * unlock all sectors.
  2150. */
  2151. flash_real_protect (&flash_info[i], 0, 0);
  2152. flash_info[i].legacy_unlock = 1;
  2153. /*
  2154. * Manually mark other sectors as
  2155. * unlocked (unprotected)
  2156. */
  2157. for (k = 1; k < flash_info[i].sector_count; k++)
  2158. flash_info[i].protect[k] = 0;
  2159. } else {
  2160. /*
  2161. * No legancy unlocking -> unlock all sectors
  2162. */
  2163. flash_protect (FLAG_PROTECT_CLEAR,
  2164. flash_info[i].start[0],
  2165. flash_info[i].start[0]
  2166. + flash_info[i].size - 1,
  2167. &flash_info[i]);
  2168. }
  2169. }
  2170. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  2171. }
  2172. flash_protect_default();
  2173. #ifdef CONFIG_FLASH_CFI_MTD
  2174. cfi_mtd_init();
  2175. #endif
  2176. return (size);
  2177. }