mv_ddr_sys_env_lib.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) Marvell International Ltd. and its affiliates
  4. */
  5. #include "mv_ddr_regs.h"
  6. #include "mv_ddr_sys_env_lib.h"
  7. static u32 mv_ddr_board_id_get(void)
  8. {
  9. #if defined(CONFIG_TARGET_DB_88F6820_GP)
  10. return DB_GP_68XX_ID;
  11. #else
  12. /*
  13. * Return 0 here for custom board as this should not be used
  14. * for custom boards.
  15. */
  16. return 0;
  17. #endif
  18. }
  19. static u32 mv_ddr_board_id_index_get(u32 board_id)
  20. {
  21. /*
  22. * Marvell Boards use 0x10 as base for Board ID:
  23. * mask MSB to receive index for board ID
  24. */
  25. return board_id & (MARVELL_BOARD_ID_MASK - 1);
  26. }
  27. /*
  28. * read gpio input for suspend-wakeup indication
  29. * return indicating suspend wakeup status:
  30. * 0 - not supported,
  31. * 1 - supported: read magic word detect wakeup,
  32. * 2 - detected wakeup from gpio
  33. */
  34. enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void)
  35. {
  36. u32 reg, board_id_index, gpio;
  37. struct board_wakeup_gpio board_gpio[] = MV_BOARD_WAKEUP_GPIO_INFO;
  38. board_id_index = mv_ddr_board_id_index_get(mv_ddr_board_id_get());
  39. if (!(sizeof(board_gpio) / sizeof(struct board_wakeup_gpio) >
  40. board_id_index)) {
  41. printf("\n_failed loading Suspend-Wakeup information (invalid board ID)\n");
  42. return SUSPEND_WAKEUP_DISABLED;
  43. }
  44. /*
  45. * - Detect if Suspend-Wakeup is supported on current board
  46. * - Fetch the GPIO number for wakeup status input indication
  47. */
  48. if (board_gpio[board_id_index].gpio_num == -1) {
  49. /* Suspend to RAM is not supported */
  50. return SUSPEND_WAKEUP_DISABLED;
  51. } else if (board_gpio[board_id_index].gpio_num == -2) {
  52. /*
  53. * Suspend to RAM is supported but GPIO indication is
  54. * not implemented - Skip
  55. */
  56. return SUSPEND_WAKEUP_ENABLED;
  57. } else {
  58. gpio = board_gpio[board_id_index].gpio_num;
  59. }
  60. /* Initialize MPP for GPIO (set MPP = 0x0) */
  61. reg = reg_read(MPP_CONTROL_REG(MPP_REG_NUM(gpio)));
  62. /* reset MPP21 to 0x0, keep rest of MPP settings*/
  63. reg &= ~MPP_MASK(gpio);
  64. reg_write(MPP_CONTROL_REG(MPP_REG_NUM(gpio)), reg);
  65. /* Initialize GPIO as input */
  66. reg = reg_read(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)));
  67. reg |= GPP_MASK(gpio);
  68. reg_write(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)), reg);
  69. /*
  70. * Check GPP for input status from PIC: 0 - regular init,
  71. * 1 - suspend wakeup
  72. */
  73. reg = reg_read(GPP_DATA_IN_REG(GPP_REG_NUM(gpio)));
  74. /* if GPIO is ON: wakeup from S2RAM indication detected */
  75. return (reg & GPP_MASK(gpio)) ? SUSPEND_WAKEUP_ENABLED_GPIO_DETECTED :
  76. SUSPEND_WAKEUP_DISABLED;
  77. }
  78. /*
  79. * get bit mask of enabled cs
  80. * return bit mask of enabled cs:
  81. * 1 - only cs0 enabled,
  82. * 3 - both cs0 and cs1 enabled
  83. */
  84. u32 mv_ddr_sys_env_get_cs_ena_from_reg(void)
  85. {
  86. return reg_read(DDR3_RANK_CTRL_REG) &
  87. ((CS_EXIST_MASK << CS_EXIST_OFFS(0)) |
  88. (CS_EXIST_MASK << CS_EXIST_OFFS(1)) |
  89. (CS_EXIST_MASK << CS_EXIST_OFFS(2)) |
  90. (CS_EXIST_MASK << CS_EXIST_OFFS(3)));
  91. }