jr.c 11 KB

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  1. /*
  2. * Copyright 2008-2014 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. * Based on CAAM driver in drivers/crypto/caam in Linux
  7. */
  8. #include <common.h>
  9. #include <malloc.h>
  10. #include "fsl_sec.h"
  11. #include "jr.h"
  12. #include "jobdesc.h"
  13. #define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - 1))
  14. #define CIRC_SPACE(head, tail, size) CIRC_CNT((tail), (head) + 1, (size))
  15. struct jobring jr;
  16. static inline void start_jr0(void)
  17. {
  18. ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
  19. u32 ctpr_ms = sec_in32(&sec->ctpr_ms);
  20. u32 scfgr = sec_in32(&sec->scfgr);
  21. if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_INCL) {
  22. /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or
  23. * VIRT_EN_INCL = 1 & VIRT_EN_POR = 0 & SEC_SCFGR_VIRT_EN = 1
  24. */
  25. if ((ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) ||
  26. (!(ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR) &&
  27. (scfgr & SEC_SCFGR_VIRT_EN)))
  28. sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0);
  29. } else {
  30. /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */
  31. if (ctpr_ms & SEC_CTPR_MS_VIRT_EN_POR)
  32. sec_out32(&sec->jrstartr, CONFIG_JRSTARTR_JR0);
  33. }
  34. }
  35. static inline void jr_reset_liodn(void)
  36. {
  37. ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
  38. sec_out32(&sec->jrliodnr[0].ls, 0);
  39. }
  40. static inline void jr_disable_irq(void)
  41. {
  42. struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
  43. uint32_t jrcfg = sec_in32(&regs->jrcfg1);
  44. jrcfg = jrcfg | JR_INTMASK;
  45. sec_out32(&regs->jrcfg1, jrcfg);
  46. }
  47. static void jr_initregs(void)
  48. {
  49. struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
  50. phys_addr_t ip_base = virt_to_phys((void *)jr.input_ring);
  51. phys_addr_t op_base = virt_to_phys((void *)jr.output_ring);
  52. #ifdef CONFIG_PHYS_64BIT
  53. sec_out32(&regs->irba_h, ip_base >> 32);
  54. #else
  55. sec_out32(&regs->irba_h, 0x0);
  56. #endif
  57. sec_out32(&regs->irba_l, (uint32_t)ip_base);
  58. #ifdef CONFIG_PHYS_64BIT
  59. sec_out32(&regs->orba_h, op_base >> 32);
  60. #else
  61. sec_out32(&regs->orba_h, 0x0);
  62. #endif
  63. sec_out32(&regs->orba_l, (uint32_t)op_base);
  64. sec_out32(&regs->ors, JR_SIZE);
  65. sec_out32(&regs->irs, JR_SIZE);
  66. if (!jr.irq)
  67. jr_disable_irq();
  68. }
  69. static int jr_init(void)
  70. {
  71. memset(&jr, 0, sizeof(struct jobring));
  72. jr.jq_id = DEFAULT_JR_ID;
  73. jr.irq = DEFAULT_IRQ;
  74. #ifdef CONFIG_FSL_CORENET
  75. jr.liodn = DEFAULT_JR_LIODN;
  76. #endif
  77. jr.size = JR_SIZE;
  78. jr.input_ring = (dma_addr_t *)memalign(ARCH_DMA_MINALIGN,
  79. JR_SIZE * sizeof(dma_addr_t));
  80. if (!jr.input_ring)
  81. return -1;
  82. jr.output_ring =
  83. (struct op_ring *)memalign(ARCH_DMA_MINALIGN,
  84. JR_SIZE * sizeof(struct op_ring));
  85. if (!jr.output_ring)
  86. return -1;
  87. memset(jr.input_ring, 0, JR_SIZE * sizeof(dma_addr_t));
  88. memset(jr.output_ring, 0, JR_SIZE * sizeof(struct op_ring));
  89. start_jr0();
  90. jr_initregs();
  91. return 0;
  92. }
  93. static int jr_sw_cleanup(void)
  94. {
  95. jr.head = 0;
  96. jr.tail = 0;
  97. jr.read_idx = 0;
  98. jr.write_idx = 0;
  99. memset(jr.info, 0, sizeof(jr.info));
  100. memset(jr.input_ring, 0, jr.size * sizeof(dma_addr_t));
  101. memset(jr.output_ring, 0, jr.size * sizeof(struct op_ring));
  102. return 0;
  103. }
  104. static int jr_hw_reset(void)
  105. {
  106. struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
  107. uint32_t timeout = 100000;
  108. uint32_t jrint, jrcr;
  109. sec_out32(&regs->jrcr, JRCR_RESET);
  110. do {
  111. jrint = sec_in32(&regs->jrint);
  112. } while (((jrint & JRINT_ERR_HALT_MASK) ==
  113. JRINT_ERR_HALT_INPROGRESS) && --timeout);
  114. jrint = sec_in32(&regs->jrint);
  115. if (((jrint & JRINT_ERR_HALT_MASK) !=
  116. JRINT_ERR_HALT_INPROGRESS) && timeout == 0)
  117. return -1;
  118. timeout = 100000;
  119. sec_out32(&regs->jrcr, JRCR_RESET);
  120. do {
  121. jrcr = sec_in32(&regs->jrcr);
  122. } while ((jrcr & JRCR_RESET) && --timeout);
  123. if (timeout == 0)
  124. return -1;
  125. return 0;
  126. }
  127. /* -1 --- error, can't enqueue -- no space available */
  128. static int jr_enqueue(uint32_t *desc_addr,
  129. void (*callback)(uint32_t desc, uint32_t status, void *arg),
  130. void *arg)
  131. {
  132. struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
  133. int head = jr.head;
  134. dma_addr_t desc_phys_addr = virt_to_phys(desc_addr);
  135. if (sec_in32(&regs->irsa) == 0 ||
  136. CIRC_SPACE(jr.head, jr.tail, jr.size) <= 0)
  137. return -1;
  138. jr.info[head].desc_phys_addr = desc_phys_addr;
  139. jr.info[head].desc_addr = (uint32_t)desc_addr;
  140. jr.info[head].callback = (void *)callback;
  141. jr.info[head].arg = arg;
  142. jr.info[head].op_done = 0;
  143. unsigned long start = (unsigned long)&jr.info[head] &
  144. ~(ARCH_DMA_MINALIGN - 1);
  145. unsigned long end = ALIGN(start + sizeof(struct jr_info),
  146. ARCH_DMA_MINALIGN);
  147. flush_dcache_range(start, end);
  148. jr.input_ring[head] = desc_phys_addr;
  149. start = (unsigned long)&jr.input_ring[head] & ~(ARCH_DMA_MINALIGN - 1);
  150. end = ALIGN(start + sizeof(dma_addr_t), ARCH_DMA_MINALIGN);
  151. flush_dcache_range(start, end);
  152. jr.head = (head + 1) & (jr.size - 1);
  153. sec_out32(&regs->irja, 1);
  154. return 0;
  155. }
  156. static int jr_dequeue(void)
  157. {
  158. struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
  159. int head = jr.head;
  160. int tail = jr.tail;
  161. int idx, i, found;
  162. void (*callback)(uint32_t desc, uint32_t status, void *arg);
  163. void *arg = NULL;
  164. while (sec_in32(&regs->orsf) && CIRC_CNT(jr.head, jr.tail, jr.size)) {
  165. unsigned long start = (unsigned long)jr.output_ring &
  166. ~(ARCH_DMA_MINALIGN - 1);
  167. unsigned long end = ALIGN(start +
  168. sizeof(struct op_ring)*JR_SIZE,
  169. ARCH_DMA_MINALIGN);
  170. invalidate_dcache_range(start, end);
  171. found = 0;
  172. dma_addr_t op_desc = jr.output_ring[jr.tail].desc;
  173. uint32_t status = jr.output_ring[jr.tail].status;
  174. uint32_t desc_virt;
  175. for (i = 0; CIRC_CNT(head, tail + i, jr.size) >= 1; i++) {
  176. idx = (tail + i) & (jr.size - 1);
  177. if (op_desc == jr.info[idx].desc_phys_addr) {
  178. desc_virt = jr.info[idx].desc_addr;
  179. found = 1;
  180. break;
  181. }
  182. }
  183. /* Error condition if match not found */
  184. if (!found)
  185. return -1;
  186. jr.info[idx].op_done = 1;
  187. callback = (void *)jr.info[idx].callback;
  188. arg = jr.info[idx].arg;
  189. /* When the job on tail idx gets done, increment
  190. * tail till the point where job completed out of oredr has
  191. * been taken into account
  192. */
  193. if (idx == tail)
  194. do {
  195. tail = (tail + 1) & (jr.size - 1);
  196. } while (jr.info[tail].op_done);
  197. jr.tail = tail;
  198. jr.read_idx = (jr.read_idx + 1) & (jr.size - 1);
  199. sec_out32(&regs->orjr, 1);
  200. jr.info[idx].op_done = 0;
  201. callback(desc_virt, status, arg);
  202. }
  203. return 0;
  204. }
  205. static void desc_done(uint32_t desc, uint32_t status, void *arg)
  206. {
  207. struct result *x = arg;
  208. x->status = status;
  209. caam_jr_strstatus(status);
  210. x->done = 1;
  211. }
  212. int run_descriptor_jr(uint32_t *desc)
  213. {
  214. unsigned long long timeval = get_ticks();
  215. unsigned long long timeout = usec2ticks(CONFIG_SEC_DEQ_TIMEOUT);
  216. struct result op;
  217. int ret = 0;
  218. memset(&op, 0, sizeof(op));
  219. ret = jr_enqueue(desc, desc_done, &op);
  220. if (ret) {
  221. debug("Error in SEC enq\n");
  222. ret = JQ_ENQ_ERR;
  223. goto out;
  224. }
  225. timeval = get_ticks();
  226. timeout = usec2ticks(CONFIG_SEC_DEQ_TIMEOUT);
  227. while (op.done != 1) {
  228. ret = jr_dequeue();
  229. if (ret) {
  230. debug("Error in SEC deq\n");
  231. ret = JQ_DEQ_ERR;
  232. goto out;
  233. }
  234. if ((get_ticks() - timeval) > timeout) {
  235. debug("SEC Dequeue timed out\n");
  236. ret = JQ_DEQ_TO_ERR;
  237. goto out;
  238. }
  239. }
  240. if (!op.status) {
  241. debug("Error %x\n", op.status);
  242. ret = op.status;
  243. }
  244. out:
  245. return ret;
  246. }
  247. int jr_reset(void)
  248. {
  249. if (jr_hw_reset() < 0)
  250. return -1;
  251. /* Clean up the jobring structure maintained by software */
  252. jr_sw_cleanup();
  253. return 0;
  254. }
  255. int sec_reset(void)
  256. {
  257. ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
  258. uint32_t mcfgr = sec_in32(&sec->mcfgr);
  259. uint32_t timeout = 100000;
  260. mcfgr |= MCFGR_SWRST;
  261. sec_out32(&sec->mcfgr, mcfgr);
  262. mcfgr |= MCFGR_DMA_RST;
  263. sec_out32(&sec->mcfgr, mcfgr);
  264. do {
  265. mcfgr = sec_in32(&sec->mcfgr);
  266. } while ((mcfgr & MCFGR_DMA_RST) == MCFGR_DMA_RST && --timeout);
  267. if (timeout == 0)
  268. return -1;
  269. timeout = 100000;
  270. do {
  271. mcfgr = sec_in32(&sec->mcfgr);
  272. } while ((mcfgr & MCFGR_SWRST) == MCFGR_SWRST && --timeout);
  273. if (timeout == 0)
  274. return -1;
  275. return 0;
  276. }
  277. static int instantiate_rng(void)
  278. {
  279. struct result op;
  280. u32 *desc;
  281. u32 rdsta_val;
  282. int ret = 0;
  283. ccsr_sec_t __iomem *sec =
  284. (ccsr_sec_t __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
  285. struct rng4tst __iomem *rng =
  286. (struct rng4tst __iomem *)&sec->rng;
  287. memset(&op, 0, sizeof(struct result));
  288. desc = memalign(ARCH_DMA_MINALIGN, sizeof(uint32_t) * 6);
  289. if (!desc) {
  290. printf("cannot allocate RNG init descriptor memory\n");
  291. return -1;
  292. }
  293. inline_cnstr_jobdesc_rng_instantiation(desc);
  294. int size = roundup(sizeof(uint32_t) * 6, ARCH_DMA_MINALIGN);
  295. flush_dcache_range((unsigned long)desc,
  296. (unsigned long)desc + size);
  297. ret = run_descriptor_jr(desc);
  298. if (ret)
  299. printf("RNG: Instantiation failed with error %x\n", ret);
  300. rdsta_val = sec_in32(&rng->rdsta);
  301. if (op.status || !(rdsta_val & RNG_STATE0_HANDLE_INSTANTIATED))
  302. return -1;
  303. return ret;
  304. }
  305. static u8 get_rng_vid(void)
  306. {
  307. ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
  308. u32 cha_vid = sec_in32(&sec->chavid_ls);
  309. return (cha_vid & SEC_CHAVID_RNG_LS_MASK) >> SEC_CHAVID_LS_RNG_SHIFT;
  310. }
  311. /*
  312. * By default, the TRNG runs for 200 clocks per sample;
  313. * 1200 clocks per sample generates better entropy.
  314. */
  315. static void kick_trng(int ent_delay)
  316. {
  317. ccsr_sec_t __iomem *sec =
  318. (ccsr_sec_t __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
  319. struct rng4tst __iomem *rng =
  320. (struct rng4tst __iomem *)&sec->rng;
  321. u32 val;
  322. /* put RNG4 into program mode */
  323. sec_setbits32(&rng->rtmctl, RTMCTL_PRGM);
  324. /* rtsdctl bits 0-15 contain "Entropy Delay, which defines the
  325. * length (in system clocks) of each Entropy sample taken
  326. * */
  327. val = sec_in32(&rng->rtsdctl);
  328. val = (val & ~RTSDCTL_ENT_DLY_MASK) |
  329. (ent_delay << RTSDCTL_ENT_DLY_SHIFT);
  330. sec_out32(&rng->rtsdctl, val);
  331. /* min. freq. count, equal to 1/4 of the entropy sample length */
  332. sec_out32(&rng->rtfreqmin, ent_delay >> 2);
  333. /* max. freq. count, equal to 8 times the entropy sample length */
  334. sec_out32(&rng->rtfreqmax, ent_delay << 3);
  335. /* put RNG4 into run mode */
  336. sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM);
  337. }
  338. static int rng_init(void)
  339. {
  340. int ret, ent_delay = RTSDCTL_ENT_DLY_MIN;
  341. ccsr_sec_t __iomem *sec =
  342. (ccsr_sec_t __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
  343. struct rng4tst __iomem *rng =
  344. (struct rng4tst __iomem *)&sec->rng;
  345. u32 rdsta = sec_in32(&rng->rdsta);
  346. /* Check if RNG state 0 handler is already instantiated */
  347. if (rdsta & RNG_STATE0_HANDLE_INSTANTIATED)
  348. return 0;
  349. do {
  350. /*
  351. * If either of the SH's were instantiated by somebody else
  352. * then it is assumed that the entropy
  353. * parameters are properly set and thus the function
  354. * setting these (kick_trng(...)) is skipped.
  355. * Also, if a handle was instantiated, do not change
  356. * the TRNG parameters.
  357. */
  358. kick_trng(ent_delay);
  359. ent_delay += 400;
  360. /*
  361. * if instantiate_rng(...) fails, the loop will rerun
  362. * and the kick_trng(...) function will modfiy the
  363. * upper and lower limits of the entropy sampling
  364. * interval, leading to a sucessful initialization of
  365. * the RNG.
  366. */
  367. ret = instantiate_rng();
  368. } while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
  369. if (ret) {
  370. printf("RNG: Failed to instantiate RNG\n");
  371. return ret;
  372. }
  373. /* Enable RDB bit so that RNG works faster */
  374. sec_setbits32(&sec->scfgr, SEC_SCFGR_RDBENABLE);
  375. return ret;
  376. }
  377. int sec_init(void)
  378. {
  379. int ret = 0;
  380. #ifdef CONFIG_PHYS_64BIT
  381. ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
  382. uint32_t mcr = sec_in32(&sec->mcfgr);
  383. sec_out32(&sec->mcfgr, mcr | 1 << MCFGR_PS_SHIFT);
  384. #endif
  385. ret = jr_init();
  386. if (ret < 0) {
  387. printf("SEC initialization failed\n");
  388. return -1;
  389. }
  390. if (get_rng_vid() >= 4) {
  391. if (rng_init() < 0) {
  392. printf("RNG instantiation failed\n");
  393. return -1;
  394. }
  395. printf("SEC: RNG instantiated\n");
  396. }
  397. return ret;
  398. }