pfuze.c 2.0 KB

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  1. /*
  2. * Copyright 2014 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <power/pmic.h>
  9. #include <power/pfuze100_pmic.h>
  10. int pfuze_mode_init(struct pmic *p, u32 mode)
  11. {
  12. unsigned char offset, i, switch_num;
  13. u32 id, ret;
  14. pmic_reg_read(p, PFUZE100_DEVICEID, &id);
  15. id = id & 0xf;
  16. if (id == 0) {
  17. switch_num = 6;
  18. offset = PFUZE100_SW1CMODE;
  19. } else if (id == 1) {
  20. switch_num = 4;
  21. offset = PFUZE100_SW2MODE;
  22. } else {
  23. printf("Not supported, id=%d\n", id);
  24. return -EINVAL;
  25. }
  26. ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode);
  27. if (ret < 0) {
  28. printf("Set SW1AB mode error!\n");
  29. return ret;
  30. }
  31. for (i = 0; i < switch_num - 1; i++) {
  32. ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode);
  33. if (ret < 0) {
  34. printf("Set switch 0x%x mode error!\n",
  35. offset + i * SWITCH_SIZE);
  36. return ret;
  37. }
  38. }
  39. return ret;
  40. }
  41. struct pmic *pfuze_common_init(unsigned char i2cbus)
  42. {
  43. struct pmic *p;
  44. int ret;
  45. unsigned int reg;
  46. ret = power_pfuze100_init(i2cbus);
  47. if (ret)
  48. return NULL;
  49. p = pmic_get("PFUZE100");
  50. ret = pmic_probe(p);
  51. if (ret)
  52. return NULL;
  53. pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
  54. printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
  55. /* Set SW1AB stanby volage to 0.975V */
  56. pmic_reg_read(p, PFUZE100_SW1ABSTBY, &reg);
  57. reg &= ~SW1x_STBY_MASK;
  58. reg |= SW1x_0_975V;
  59. pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg);
  60. /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
  61. pmic_reg_read(p, PUZE_100_SW1ABCONF, &reg);
  62. reg &= ~SW1xCONF_DVSSPEED_MASK;
  63. reg |= SW1xCONF_DVSSPEED_4US;
  64. pmic_reg_write(p, PUZE_100_SW1ABCONF, reg);
  65. /* Set SW1C standby voltage to 0.975V */
  66. pmic_reg_read(p, PFUZE100_SW1CSTBY, &reg);
  67. reg &= ~SW1x_STBY_MASK;
  68. reg |= SW1x_0_975V;
  69. pmic_reg_write(p, PFUZE100_SW1CSTBY, reg);
  70. /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
  71. pmic_reg_read(p, PFUZE100_SW1CCONF, &reg);
  72. reg &= ~SW1xCONF_DVSSPEED_MASK;
  73. reg |= SW1xCONF_DVSSPEED_4US;
  74. pmic_reg_write(p, PFUZE100_SW1CCONF, reg);
  75. return p;
  76. }