xilinx_irq.h 951 B

12345678910111213141516171819202122232425
  1. /*
  2. * (C) Copyright 2008
  3. * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com
  4. * This work has been supported by: QTechnology http://qtec.com/
  5. * Based on interrupts.c Wolfgang Denk-DENX Software Engineering-wd@denx.de
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef XILINX_IRQ_H
  9. #define XILINX_IRQ_H
  10. #define intc XPAR_INTC_0_BASEADDR
  11. #define ISR (intc + (0 * 4)) /* Interrupt Status Register */
  12. #define IPR (intc + (1 * 4)) /* Interrupt Pending Register */
  13. #define IER (intc + (2 * 4)) /* Interrupt Enable Register */
  14. #define IAR (intc + (3 * 4)) /* Interrupt Acknowledge Register */
  15. #define SIE (intc + (4 * 4)) /* Set Interrupt Enable bits */
  16. #define CIE (intc + (5 * 4)) /* Clear Interrupt Enable bits */
  17. #define IVR (intc + (6 * 4)) /* Interrupt Vector Register */
  18. #define MER (intc + (7 * 4)) /* Master Enable Register */
  19. #define IRQ_MASK(irq) (1 << (irq & 0x1f))
  20. #define IRQ_MAX XPAR_INTC_MAX_NUM_INTR_INPUTS
  21. #endif