s3c_udc_otg.c 20 KB

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  1. /*
  2. * drivers/usb/gadget/s3c_udc_otg.c
  3. * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
  4. *
  5. * Copyright (C) 2008 for Samsung Electronics
  6. *
  7. * BSP Support for Samsung's UDC driver
  8. * available at:
  9. * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
  10. *
  11. * State machine bugfixes:
  12. * Marek Szyprowski <m.szyprowski@samsung.com>
  13. *
  14. * Ported to u-boot:
  15. * Marek Szyprowski <m.szyprowski@samsung.com>
  16. * Lukasz Majewski <l.majewski@samsumg.com>
  17. *
  18. * SPDX-License-Identifier: GPL-2.0+
  19. */
  20. #undef DEBUG
  21. #include <common.h>
  22. #include <asm/errno.h>
  23. #include <linux/list.h>
  24. #include <malloc.h>
  25. #include <linux/usb/ch9.h>
  26. #include <linux/usb/gadget.h>
  27. #include <asm/byteorder.h>
  28. #include <asm/unaligned.h>
  29. #include <asm/io.h>
  30. #include <asm/mach-types.h>
  31. #include "s3c_udc_otg_regs.h"
  32. #include <usb/lin_gadget_compat.h>
  33. /***********************************************************/
  34. #define OTG_DMA_MODE 1
  35. #define DEBUG_SETUP 0
  36. #define DEBUG_EP0 0
  37. #define DEBUG_ISR 0
  38. #define DEBUG_OUT_EP 0
  39. #define DEBUG_IN_EP 0
  40. #include <usb/s3c_udc.h>
  41. #define EP0_CON 0
  42. #define EP_MASK 0xF
  43. static char *state_names[] = {
  44. "WAIT_FOR_SETUP",
  45. "DATA_STATE_XMIT",
  46. "DATA_STATE_NEED_ZLP",
  47. "WAIT_FOR_OUT_STATUS",
  48. "DATA_STATE_RECV",
  49. "WAIT_FOR_COMPLETE",
  50. "WAIT_FOR_OUT_COMPLETE",
  51. "WAIT_FOR_IN_COMPLETE",
  52. "WAIT_FOR_NULL_COMPLETE",
  53. };
  54. #define DRIVER_DESC "S3C HS USB OTG Device Driver, (c) Samsung Electronics"
  55. #define DRIVER_VERSION "15 March 2009"
  56. struct dwc2_udc *the_controller;
  57. static const char driver_name[] = "s3c-udc";
  58. static const char driver_desc[] = DRIVER_DESC;
  59. static const char ep0name[] = "ep0-control";
  60. /* Max packet size*/
  61. static unsigned int ep0_fifo_size = 64;
  62. static unsigned int ep_fifo_size = 512;
  63. static unsigned int ep_fifo_size2 = 1024;
  64. static int reset_available = 1;
  65. static struct usb_ctrlrequest *usb_ctrl;
  66. static dma_addr_t usb_ctrl_dma_addr;
  67. /*
  68. Local declarations.
  69. */
  70. static int s3c_ep_enable(struct usb_ep *ep,
  71. const struct usb_endpoint_descriptor *);
  72. static int s3c_ep_disable(struct usb_ep *ep);
  73. static struct usb_request *s3c_alloc_request(struct usb_ep *ep,
  74. gfp_t gfp_flags);
  75. static void s3c_free_request(struct usb_ep *ep, struct usb_request *);
  76. static int s3c_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
  77. static int s3c_dequeue(struct usb_ep *ep, struct usb_request *);
  78. static int s3c_fifo_status(struct usb_ep *ep);
  79. static void s3c_fifo_flush(struct usb_ep *ep);
  80. static void s3c_ep0_read(struct dwc2_udc *dev);
  81. static void s3c_ep0_kick(struct dwc2_udc *dev, struct s3c_ep *ep);
  82. static void s3c_handle_ep0(struct dwc2_udc *dev);
  83. static int s3c_ep0_write(struct dwc2_udc *dev);
  84. static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req);
  85. static void done(struct s3c_ep *ep, struct s3c_request *req, int status);
  86. static void stop_activity(struct dwc2_udc *dev,
  87. struct usb_gadget_driver *driver);
  88. static int udc_enable(struct dwc2_udc *dev);
  89. static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
  90. static void reconfig_usbd(struct dwc2_udc *dev);
  91. static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
  92. static void nuke(struct s3c_ep *ep, int status);
  93. static int s3c_udc_set_halt(struct usb_ep *_ep, int value);
  94. static void s3c_udc_set_nak(struct s3c_ep *ep);
  95. void set_udc_gadget_private_data(void *p)
  96. {
  97. debug_cond(DEBUG_SETUP != 0,
  98. "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
  99. the_controller, p);
  100. the_controller->gadget.dev.device_data = p;
  101. }
  102. void *get_udc_gadget_private_data(struct usb_gadget *gadget)
  103. {
  104. return gadget->dev.device_data;
  105. }
  106. static struct usb_ep_ops s3c_ep_ops = {
  107. .enable = s3c_ep_enable,
  108. .disable = s3c_ep_disable,
  109. .alloc_request = s3c_alloc_request,
  110. .free_request = s3c_free_request,
  111. .queue = s3c_queue,
  112. .dequeue = s3c_dequeue,
  113. .set_halt = s3c_udc_set_halt,
  114. .fifo_status = s3c_fifo_status,
  115. .fifo_flush = s3c_fifo_flush,
  116. };
  117. #define create_proc_files() do {} while (0)
  118. #define remove_proc_files() do {} while (0)
  119. /***********************************************************/
  120. void __iomem *regs_otg;
  121. struct dwc2_usbotg_reg *reg;
  122. bool dfu_usb_get_reset(void)
  123. {
  124. return !!(readl(&reg->gintsts) & INT_RESET);
  125. }
  126. __weak void otg_phy_init(struct dwc2_udc *dev) {}
  127. __weak void otg_phy_off(struct dwc2_udc *dev) {}
  128. /***********************************************************/
  129. #include "s3c_udc_otg_xfer_dma.c"
  130. /*
  131. * udc_disable - disable USB device controller
  132. */
  133. static void udc_disable(struct dwc2_udc *dev)
  134. {
  135. debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
  136. udc_set_address(dev, 0);
  137. dev->ep0state = WAIT_FOR_SETUP;
  138. dev->gadget.speed = USB_SPEED_UNKNOWN;
  139. dev->usb_address = 0;
  140. otg_phy_off(dev);
  141. }
  142. /*
  143. * udc_reinit - initialize software state
  144. */
  145. static void udc_reinit(struct dwc2_udc *dev)
  146. {
  147. unsigned int i;
  148. debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
  149. /* device/ep0 records init */
  150. INIT_LIST_HEAD(&dev->gadget.ep_list);
  151. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  152. dev->ep0state = WAIT_FOR_SETUP;
  153. /* basic endpoint records init */
  154. for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
  155. struct s3c_ep *ep = &dev->ep[i];
  156. if (i != 0)
  157. list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
  158. ep->desc = 0;
  159. ep->stopped = 0;
  160. INIT_LIST_HEAD(&ep->queue);
  161. ep->pio_irqs = 0;
  162. }
  163. /* the rest was statically initialized, and is read-only */
  164. }
  165. #define BYTES2MAXP(x) (x / 8)
  166. #define MAXP2BYTES(x) (x * 8)
  167. /* until it's enabled, this UDC should be completely invisible
  168. * to any USB host.
  169. */
  170. static int udc_enable(struct dwc2_udc *dev)
  171. {
  172. debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
  173. otg_phy_init(dev);
  174. reconfig_usbd(dev);
  175. debug_cond(DEBUG_SETUP != 0,
  176. "S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n",
  177. readl(&reg->gintmsk));
  178. dev->gadget.speed = USB_SPEED_UNKNOWN;
  179. return 0;
  180. }
  181. /*
  182. Register entry point for the peripheral controller driver.
  183. */
  184. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  185. {
  186. struct dwc2_udc *dev = the_controller;
  187. int retval = 0;
  188. unsigned long flags = 0;
  189. debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
  190. if (!driver
  191. || (driver->speed != USB_SPEED_FULL
  192. && driver->speed != USB_SPEED_HIGH)
  193. || !driver->bind || !driver->disconnect || !driver->setup)
  194. return -EINVAL;
  195. if (!dev)
  196. return -ENODEV;
  197. if (dev->driver)
  198. return -EBUSY;
  199. spin_lock_irqsave(&dev->lock, flags);
  200. /* first hook up the driver ... */
  201. dev->driver = driver;
  202. spin_unlock_irqrestore(&dev->lock, flags);
  203. if (retval) { /* TODO */
  204. printf("target device_add failed, error %d\n", retval);
  205. return retval;
  206. }
  207. retval = driver->bind(&dev->gadget);
  208. if (retval) {
  209. debug_cond(DEBUG_SETUP != 0,
  210. "%s: bind to driver --> error %d\n",
  211. dev->gadget.name, retval);
  212. dev->driver = 0;
  213. return retval;
  214. }
  215. enable_irq(IRQ_OTG);
  216. debug_cond(DEBUG_SETUP != 0,
  217. "Registered gadget driver %s\n", dev->gadget.name);
  218. udc_enable(dev);
  219. return 0;
  220. }
  221. /*
  222. * Unregister entry point for the peripheral controller driver.
  223. */
  224. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  225. {
  226. struct dwc2_udc *dev = the_controller;
  227. unsigned long flags = 0;
  228. if (!dev)
  229. return -ENODEV;
  230. if (!driver || driver != dev->driver)
  231. return -EINVAL;
  232. spin_lock_irqsave(&dev->lock, flags);
  233. dev->driver = 0;
  234. stop_activity(dev, driver);
  235. spin_unlock_irqrestore(&dev->lock, flags);
  236. driver->unbind(&dev->gadget);
  237. disable_irq(IRQ_OTG);
  238. udc_disable(dev);
  239. return 0;
  240. }
  241. /*
  242. * done - retire a request; caller blocked irqs
  243. */
  244. static void done(struct s3c_ep *ep, struct s3c_request *req, int status)
  245. {
  246. unsigned int stopped = ep->stopped;
  247. debug("%s: %s %p, req = %p, stopped = %d\n",
  248. __func__, ep->ep.name, ep, &req->req, stopped);
  249. list_del_init(&req->queue);
  250. if (likely(req->req.status == -EINPROGRESS))
  251. req->req.status = status;
  252. else
  253. status = req->req.status;
  254. if (status && status != -ESHUTDOWN) {
  255. debug("complete %s req %p stat %d len %u/%u\n",
  256. ep->ep.name, &req->req, status,
  257. req->req.actual, req->req.length);
  258. }
  259. /* don't modify queue heads during completion callback */
  260. ep->stopped = 1;
  261. #ifdef DEBUG
  262. printf("calling complete callback\n");
  263. {
  264. int i, len = req->req.length;
  265. printf("pkt[%d] = ", req->req.length);
  266. if (len > 64)
  267. len = 64;
  268. for (i = 0; i < len; i++) {
  269. printf("%02x", ((u8 *)req->req.buf)[i]);
  270. if ((i & 7) == 7)
  271. printf(" ");
  272. }
  273. printf("\n");
  274. }
  275. #endif
  276. spin_unlock(&ep->dev->lock);
  277. req->req.complete(&ep->ep, &req->req);
  278. spin_lock(&ep->dev->lock);
  279. debug("callback completed\n");
  280. ep->stopped = stopped;
  281. }
  282. /*
  283. * nuke - dequeue ALL requests
  284. */
  285. static void nuke(struct s3c_ep *ep, int status)
  286. {
  287. struct s3c_request *req;
  288. debug("%s: %s %p\n", __func__, ep->ep.name, ep);
  289. /* called with irqs blocked */
  290. while (!list_empty(&ep->queue)) {
  291. req = list_entry(ep->queue.next, struct s3c_request, queue);
  292. done(ep, req, status);
  293. }
  294. }
  295. static void stop_activity(struct dwc2_udc *dev,
  296. struct usb_gadget_driver *driver)
  297. {
  298. int i;
  299. /* don't disconnect drivers more than once */
  300. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  301. driver = 0;
  302. dev->gadget.speed = USB_SPEED_UNKNOWN;
  303. /* prevent new request submissions, kill any outstanding requests */
  304. for (i = 0; i < S3C_MAX_ENDPOINTS; i++) {
  305. struct s3c_ep *ep = &dev->ep[i];
  306. ep->stopped = 1;
  307. nuke(ep, -ESHUTDOWN);
  308. }
  309. /* report disconnect; the driver is already quiesced */
  310. if (driver) {
  311. spin_unlock(&dev->lock);
  312. driver->disconnect(&dev->gadget);
  313. spin_lock(&dev->lock);
  314. }
  315. /* re-init driver-visible data structures */
  316. udc_reinit(dev);
  317. }
  318. static void reconfig_usbd(struct dwc2_udc *dev)
  319. {
  320. /* 2. Soft-reset OTG Core and then unreset again. */
  321. int i;
  322. unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
  323. uint32_t dflt_gusbcfg;
  324. debug("Reseting OTG controller\n");
  325. dflt_gusbcfg =
  326. 0<<15 /* PHY Low Power Clock sel*/
  327. |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
  328. |0x5<<10 /* Turnaround time*/
  329. |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
  330. /* 1:SRP enable] H1= 1,1*/
  331. |0<<7 /* Ulpi DDR sel*/
  332. |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
  333. |0<<4 /* 0: utmi+, 1:ulpi*/
  334. |1<<3 /* phy i/f 0:8bit, 1:16bit*/
  335. |0x7<<0; /* HS/FS Timeout**/
  336. if (dev->pdata->usb_gusbcfg)
  337. dflt_gusbcfg = dev->pdata->usb_gusbcfg;
  338. writel(dflt_gusbcfg, &reg->gusbcfg);
  339. /* 3. Put the OTG device core in the disconnected state.*/
  340. uTemp = readl(&reg->dctl);
  341. uTemp |= SOFT_DISCONNECT;
  342. writel(uTemp, &reg->dctl);
  343. udelay(20);
  344. /* 4. Make the OTG device core exit from the disconnected state.*/
  345. uTemp = readl(&reg->dctl);
  346. uTemp = uTemp & ~SOFT_DISCONNECT;
  347. writel(uTemp, &reg->dctl);
  348. /* 5. Configure OTG Core to initial settings of device mode.*/
  349. /* [][1: full speed(30Mhz) 0:high speed]*/
  350. writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, &reg->dcfg);
  351. mdelay(1);
  352. /* 6. Unmask the core interrupts*/
  353. writel(GINTMSK_INIT, &reg->gintmsk);
  354. /* 7. Set NAK bit of EP0, EP1, EP2*/
  355. writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[EP0_CON].doepctl);
  356. writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[EP0_CON].diepctl);
  357. for (i = 1; i < S3C_MAX_ENDPOINTS; i++) {
  358. writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[i].doepctl);
  359. writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[i].diepctl);
  360. }
  361. /* 8. Unmask EPO interrupts*/
  362. writel(((1 << EP0_CON) << DAINT_OUT_BIT)
  363. | (1 << EP0_CON), &reg->daintmsk);
  364. /* 9. Unmask device OUT EP common interrupts*/
  365. writel(DOEPMSK_INIT, &reg->doepmsk);
  366. /* 10. Unmask device IN EP common interrupts*/
  367. writel(DIEPMSK_INIT, &reg->diepmsk);
  368. /* 11. Set Rx FIFO Size (in 32-bit words) */
  369. writel(RX_FIFO_SIZE >> 2, &reg->grxfsiz);
  370. /* 12. Set Non Periodic Tx FIFO Size */
  371. writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0,
  372. &reg->gnptxfsiz);
  373. for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++)
  374. writel((PTX_FIFO_SIZE >> 2) << 16 |
  375. ((RX_FIFO_SIZE + NPTX_FIFO_SIZE +
  376. PTX_FIFO_SIZE*(i-1)) >> 2) << 0,
  377. &reg->dieptxf[i-1]);
  378. /* Flush the RX FIFO */
  379. writel(RX_FIFO_FLUSH, &reg->grstctl);
  380. while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
  381. debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
  382. /* Flush all the Tx FIFO's */
  383. writel(TX_FIFO_FLUSH_ALL, &reg->grstctl);
  384. writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, &reg->grstctl);
  385. while (readl(&reg->grstctl) & TX_FIFO_FLUSH)
  386. debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__);
  387. /* 13. Clear NAK bit of EP0, EP1, EP2*/
  388. /* For Slave mode*/
  389. /* EP0: Control OUT */
  390. writel(DEPCTL_EPDIS | DEPCTL_CNAK,
  391. &reg->out_endp[EP0_CON].doepctl);
  392. /* 14. Initialize OTG Link Core.*/
  393. writel(GAHBCFG_INIT, &reg->gahbcfg);
  394. }
  395. static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
  396. {
  397. unsigned int ep_ctrl;
  398. int i;
  399. if (speed == USB_SPEED_HIGH) {
  400. ep0_fifo_size = 64;
  401. ep_fifo_size = 512;
  402. ep_fifo_size2 = 1024;
  403. dev->gadget.speed = USB_SPEED_HIGH;
  404. } else {
  405. ep0_fifo_size = 64;
  406. ep_fifo_size = 64;
  407. ep_fifo_size2 = 64;
  408. dev->gadget.speed = USB_SPEED_FULL;
  409. }
  410. dev->ep[0].ep.maxpacket = ep0_fifo_size;
  411. for (i = 1; i < S3C_MAX_ENDPOINTS; i++)
  412. dev->ep[i].ep.maxpacket = ep_fifo_size;
  413. /* EP0 - Control IN (64 bytes)*/
  414. ep_ctrl = readl(&reg->in_endp[EP0_CON].diepctl);
  415. writel(ep_ctrl|(0<<0), &reg->in_endp[EP0_CON].diepctl);
  416. /* EP0 - Control OUT (64 bytes)*/
  417. ep_ctrl = readl(&reg->out_endp[EP0_CON].doepctl);
  418. writel(ep_ctrl|(0<<0), &reg->out_endp[EP0_CON].doepctl);
  419. }
  420. static int s3c_ep_enable(struct usb_ep *_ep,
  421. const struct usb_endpoint_descriptor *desc)
  422. {
  423. struct s3c_ep *ep;
  424. struct dwc2_udc *dev;
  425. unsigned long flags = 0;
  426. debug("%s: %p\n", __func__, _ep);
  427. ep = container_of(_ep, struct s3c_ep, ep);
  428. if (!_ep || !desc || ep->desc || _ep->name == ep0name
  429. || desc->bDescriptorType != USB_DT_ENDPOINT
  430. || ep->bEndpointAddress != desc->bEndpointAddress
  431. || ep_maxpacket(ep) <
  432. le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
  433. debug("%s: bad ep or descriptor\n", __func__);
  434. return -EINVAL;
  435. }
  436. /* xfer types must match, except that interrupt ~= bulk */
  437. if (ep->bmAttributes != desc->bmAttributes
  438. && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
  439. && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
  440. debug("%s: %s type mismatch\n", __func__, _ep->name);
  441. return -EINVAL;
  442. }
  443. /* hardware _could_ do smaller, but driver doesn't */
  444. if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
  445. && le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) !=
  446. ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
  447. debug("%s: bad %s maxpacket\n", __func__, _ep->name);
  448. return -ERANGE;
  449. }
  450. dev = ep->dev;
  451. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  452. debug("%s: bogus device state\n", __func__);
  453. return -ESHUTDOWN;
  454. }
  455. ep->stopped = 0;
  456. ep->desc = desc;
  457. ep->pio_irqs = 0;
  458. ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
  459. /* Reset halt state */
  460. s3c_udc_set_nak(ep);
  461. s3c_udc_set_halt(_ep, 0);
  462. spin_lock_irqsave(&ep->dev->lock, flags);
  463. s3c_udc_ep_activate(ep);
  464. spin_unlock_irqrestore(&ep->dev->lock, flags);
  465. debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
  466. __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
  467. return 0;
  468. }
  469. /*
  470. * Disable EP
  471. */
  472. static int s3c_ep_disable(struct usb_ep *_ep)
  473. {
  474. struct s3c_ep *ep;
  475. unsigned long flags = 0;
  476. debug("%s: %p\n", __func__, _ep);
  477. ep = container_of(_ep, struct s3c_ep, ep);
  478. if (!_ep || !ep->desc) {
  479. debug("%s: %s not enabled\n", __func__,
  480. _ep ? ep->ep.name : NULL);
  481. return -EINVAL;
  482. }
  483. spin_lock_irqsave(&ep->dev->lock, flags);
  484. /* Nuke all pending requests */
  485. nuke(ep, -ESHUTDOWN);
  486. ep->desc = 0;
  487. ep->stopped = 1;
  488. spin_unlock_irqrestore(&ep->dev->lock, flags);
  489. debug("%s: disabled %s\n", __func__, _ep->name);
  490. return 0;
  491. }
  492. static struct usb_request *s3c_alloc_request(struct usb_ep *ep,
  493. gfp_t gfp_flags)
  494. {
  495. struct s3c_request *req;
  496. debug("%s: %s %p\n", __func__, ep->name, ep);
  497. req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
  498. if (!req)
  499. return 0;
  500. memset(req, 0, sizeof *req);
  501. INIT_LIST_HEAD(&req->queue);
  502. return &req->req;
  503. }
  504. static void s3c_free_request(struct usb_ep *ep, struct usb_request *_req)
  505. {
  506. struct s3c_request *req;
  507. debug("%s: %p\n", __func__, ep);
  508. req = container_of(_req, struct s3c_request, req);
  509. WARN_ON(!list_empty(&req->queue));
  510. kfree(req);
  511. }
  512. /* dequeue JUST ONE request */
  513. static int s3c_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  514. {
  515. struct s3c_ep *ep;
  516. struct s3c_request *req;
  517. unsigned long flags = 0;
  518. debug("%s: %p\n", __func__, _ep);
  519. ep = container_of(_ep, struct s3c_ep, ep);
  520. if (!_ep || ep->ep.name == ep0name)
  521. return -EINVAL;
  522. spin_lock_irqsave(&ep->dev->lock, flags);
  523. /* make sure it's actually queued on this endpoint */
  524. list_for_each_entry(req, &ep->queue, queue) {
  525. if (&req->req == _req)
  526. break;
  527. }
  528. if (&req->req != _req) {
  529. spin_unlock_irqrestore(&ep->dev->lock, flags);
  530. return -EINVAL;
  531. }
  532. done(ep, req, -ECONNRESET);
  533. spin_unlock_irqrestore(&ep->dev->lock, flags);
  534. return 0;
  535. }
  536. /*
  537. * Return bytes in EP FIFO
  538. */
  539. static int s3c_fifo_status(struct usb_ep *_ep)
  540. {
  541. int count = 0;
  542. struct s3c_ep *ep;
  543. ep = container_of(_ep, struct s3c_ep, ep);
  544. if (!_ep) {
  545. debug("%s: bad ep\n", __func__);
  546. return -ENODEV;
  547. }
  548. debug("%s: %d\n", __func__, ep_index(ep));
  549. /* LPD can't report unclaimed bytes from IN fifos */
  550. if (ep_is_in(ep))
  551. return -EOPNOTSUPP;
  552. return count;
  553. }
  554. /*
  555. * Flush EP FIFO
  556. */
  557. static void s3c_fifo_flush(struct usb_ep *_ep)
  558. {
  559. struct s3c_ep *ep;
  560. ep = container_of(_ep, struct s3c_ep, ep);
  561. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  562. debug("%s: bad ep\n", __func__);
  563. return;
  564. }
  565. debug("%s: %d\n", __func__, ep_index(ep));
  566. }
  567. static const struct usb_gadget_ops s3c_udc_ops = {
  568. /* current versions must always be self-powered */
  569. };
  570. static struct dwc2_udc memory = {
  571. .usb_address = 0,
  572. .gadget = {
  573. .ops = &s3c_udc_ops,
  574. .ep0 = &memory.ep[0].ep,
  575. .name = driver_name,
  576. },
  577. /* control endpoint */
  578. .ep[0] = {
  579. .ep = {
  580. .name = ep0name,
  581. .ops = &s3c_ep_ops,
  582. .maxpacket = EP0_FIFO_SIZE,
  583. },
  584. .dev = &memory,
  585. .bEndpointAddress = 0,
  586. .bmAttributes = 0,
  587. .ep_type = ep_control,
  588. },
  589. /* first group of endpoints */
  590. .ep[1] = {
  591. .ep = {
  592. .name = "ep1in-bulk",
  593. .ops = &s3c_ep_ops,
  594. .maxpacket = EP_FIFO_SIZE,
  595. },
  596. .dev = &memory,
  597. .bEndpointAddress = USB_DIR_IN | 1,
  598. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  599. .ep_type = ep_bulk_out,
  600. .fifo_num = 1,
  601. },
  602. .ep[2] = {
  603. .ep = {
  604. .name = "ep2out-bulk",
  605. .ops = &s3c_ep_ops,
  606. .maxpacket = EP_FIFO_SIZE,
  607. },
  608. .dev = &memory,
  609. .bEndpointAddress = USB_DIR_OUT | 2,
  610. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  611. .ep_type = ep_bulk_in,
  612. .fifo_num = 2,
  613. },
  614. .ep[3] = {
  615. .ep = {
  616. .name = "ep3in-int",
  617. .ops = &s3c_ep_ops,
  618. .maxpacket = EP_FIFO_SIZE,
  619. },
  620. .dev = &memory,
  621. .bEndpointAddress = USB_DIR_IN | 3,
  622. .bmAttributes = USB_ENDPOINT_XFER_INT,
  623. .ep_type = ep_interrupt,
  624. .fifo_num = 3,
  625. },
  626. };
  627. /*
  628. * probe - binds to the platform device
  629. */
  630. int s3c_udc_probe(struct s3c_plat_otg_data *pdata)
  631. {
  632. struct dwc2_udc *dev = &memory;
  633. int retval = 0;
  634. debug("%s: %p\n", __func__, pdata);
  635. dev->pdata = pdata;
  636. reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
  637. /* regs_otg = (void *)pdata->regs_otg; */
  638. dev->gadget.is_dualspeed = 1; /* Hack only*/
  639. dev->gadget.is_otg = 0;
  640. dev->gadget.is_a_peripheral = 0;
  641. dev->gadget.b_hnp_enable = 0;
  642. dev->gadget.a_hnp_support = 0;
  643. dev->gadget.a_alt_hnp_support = 0;
  644. the_controller = dev;
  645. usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
  646. ROUND(sizeof(struct usb_ctrlrequest),
  647. CONFIG_SYS_CACHELINE_SIZE));
  648. if (!usb_ctrl) {
  649. error("No memory available for UDC!\n");
  650. return -ENOMEM;
  651. }
  652. usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
  653. udc_reinit(dev);
  654. return retval;
  655. }
  656. int usb_gadget_handle_interrupts(int index)
  657. {
  658. u32 intr_status = readl(&reg->gintsts);
  659. u32 gintmsk = readl(&reg->gintmsk);
  660. if (intr_status & gintmsk)
  661. return s3c_udc_irq(1, (void *)the_controller);
  662. return 0;
  663. }