cfi_flash.c 61 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * SPDX-License-Identifier: GPL-2.0+
  15. */
  16. /* The DEBUG define must be before common to enable debugging */
  17. /* #define DEBUG */
  18. #include <common.h>
  19. #include <asm/processor.h>
  20. #include <asm/io.h>
  21. #include <asm/byteorder.h>
  22. #include <asm/unaligned.h>
  23. #include <environment.h>
  24. #include <mtd/cfi_flash.h>
  25. #include <watchdog.h>
  26. /*
  27. * This file implements a Common Flash Interface (CFI) driver for
  28. * U-Boot.
  29. *
  30. * The width of the port and the width of the chips are determined at
  31. * initialization. These widths are used to calculate the address for
  32. * access CFI data structures.
  33. *
  34. * References
  35. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  36. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  37. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  38. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  39. * AMD CFI Specification, Release 2.0 December 1, 2001
  40. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  41. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  42. *
  43. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  44. * reading and writing ... (yes there is such a Hardware).
  45. */
  46. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  47. #ifdef CONFIG_FLASH_CFI_MTD
  48. static uint flash_verbose = 1;
  49. #else
  50. #define flash_verbose 1
  51. #endif
  52. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  53. /*
  54. * Check if chip width is defined. If not, start detecting with 8bit.
  55. */
  56. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  57. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  58. #endif
  59. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  60. #define __maybe_weak __weak
  61. #else
  62. #define __maybe_weak static
  63. #endif
  64. /*
  65. * 0xffff is an undefined value for the configuration register. When
  66. * this value is returned, the configuration register shall not be
  67. * written at all (default mode).
  68. */
  69. static u16 cfi_flash_config_reg(int i)
  70. {
  71. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  72. return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  73. #else
  74. return 0xffff;
  75. #endif
  76. }
  77. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  78. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  79. #endif
  80. __weak phys_addr_t cfi_flash_bank_addr(int i)
  81. {
  82. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  83. }
  84. __weak unsigned long cfi_flash_bank_size(int i)
  85. {
  86. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  87. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  88. #else
  89. return 0;
  90. #endif
  91. }
  92. __maybe_weak void flash_write8(u8 value, void *addr)
  93. {
  94. __raw_writeb(value, addr);
  95. }
  96. __maybe_weak void flash_write16(u16 value, void *addr)
  97. {
  98. __raw_writew(value, addr);
  99. }
  100. __maybe_weak void flash_write32(u32 value, void *addr)
  101. {
  102. __raw_writel(value, addr);
  103. }
  104. __maybe_weak void flash_write64(u64 value, void *addr)
  105. {
  106. /* No architectures currently implement __raw_writeq() */
  107. *(volatile u64 *)addr = value;
  108. }
  109. __maybe_weak u8 flash_read8(void *addr)
  110. {
  111. return __raw_readb(addr);
  112. }
  113. __maybe_weak u16 flash_read16(void *addr)
  114. {
  115. return __raw_readw(addr);
  116. }
  117. __maybe_weak u32 flash_read32(void *addr)
  118. {
  119. return __raw_readl(addr);
  120. }
  121. __maybe_weak u64 flash_read64(void *addr)
  122. {
  123. /* No architectures currently implement __raw_readq() */
  124. return *(volatile u64 *)addr;
  125. }
  126. /*-----------------------------------------------------------------------
  127. */
  128. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  129. flash_info_t *flash_get_info(ulong base)
  130. {
  131. int i;
  132. flash_info_t *info;
  133. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  134. info = &flash_info[i];
  135. if (info->size && info->start[0] <= base &&
  136. base <= info->start[0] + info->size - 1)
  137. return info;
  138. }
  139. return NULL;
  140. }
  141. #endif
  142. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  143. {
  144. if (sect != (info->sector_count - 1))
  145. return info->start[sect + 1] - info->start[sect];
  146. else
  147. return info->start[0] + info->size - info->start[sect];
  148. }
  149. /*-----------------------------------------------------------------------
  150. * create an address based on the offset and the port width
  151. */
  152. static inline void *
  153. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  154. {
  155. unsigned int byte_offset = offset * info->portwidth;
  156. return (void *)(info->start[sect] + byte_offset);
  157. }
  158. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  159. unsigned int offset, void *addr)
  160. {
  161. }
  162. /*-----------------------------------------------------------------------
  163. * make a proper sized command based on the port and chip widths
  164. */
  165. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  166. {
  167. int i;
  168. int cword_offset;
  169. int cp_offset;
  170. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  171. u32 cmd_le = cpu_to_le32(cmd);
  172. #endif
  173. uchar val;
  174. uchar *cp = (uchar *) cmdbuf;
  175. for (i = info->portwidth; i > 0; i--){
  176. cword_offset = (info->portwidth-i)%info->chipwidth;
  177. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  178. cp_offset = info->portwidth - i;
  179. val = *((uchar*)&cmd_le + cword_offset);
  180. #else
  181. cp_offset = i - 1;
  182. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  183. #endif
  184. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  185. }
  186. }
  187. #ifdef DEBUG
  188. /*-----------------------------------------------------------------------
  189. * Debug support
  190. */
  191. static void print_longlong (char *str, unsigned long long data)
  192. {
  193. int i;
  194. char *cp;
  195. cp = (char *) &data;
  196. for (i = 0; i < 8; i++)
  197. sprintf (&str[i * 2], "%2.2x", *cp++);
  198. }
  199. static void flash_printqry (struct cfi_qry *qry)
  200. {
  201. u8 *p = (u8 *)qry;
  202. int x, y;
  203. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  204. debug("%02x : ", x);
  205. for (y = 0; y < 16; y++)
  206. debug("%2.2x ", p[x + y]);
  207. debug(" ");
  208. for (y = 0; y < 16; y++) {
  209. unsigned char c = p[x + y];
  210. if (c >= 0x20 && c <= 0x7e)
  211. debug("%c", c);
  212. else
  213. debug(".");
  214. }
  215. debug("\n");
  216. }
  217. }
  218. #endif
  219. /*-----------------------------------------------------------------------
  220. * read a character at a port width address
  221. */
  222. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  223. {
  224. uchar *cp;
  225. uchar retval;
  226. cp = flash_map (info, 0, offset);
  227. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  228. retval = flash_read8(cp);
  229. #else
  230. retval = flash_read8(cp + info->portwidth - 1);
  231. #endif
  232. flash_unmap (info, 0, offset, cp);
  233. return retval;
  234. }
  235. /*-----------------------------------------------------------------------
  236. * read a word at a port width address, assume 16bit bus
  237. */
  238. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  239. {
  240. ushort *addr, retval;
  241. addr = flash_map (info, 0, offset);
  242. retval = flash_read16 (addr);
  243. flash_unmap (info, 0, offset, addr);
  244. return retval;
  245. }
  246. /*-----------------------------------------------------------------------
  247. * read a long word by picking the least significant byte of each maximum
  248. * port size word. Swap for ppc format.
  249. */
  250. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  251. uint offset)
  252. {
  253. uchar *addr;
  254. ulong retval;
  255. #ifdef DEBUG
  256. int x;
  257. #endif
  258. addr = flash_map (info, sect, offset);
  259. #ifdef DEBUG
  260. debug ("long addr is at %p info->portwidth = %d\n", addr,
  261. info->portwidth);
  262. for (x = 0; x < 4 * info->portwidth; x++) {
  263. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  264. }
  265. #endif
  266. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  267. retval = ((flash_read8(addr) << 16) |
  268. (flash_read8(addr + info->portwidth) << 24) |
  269. (flash_read8(addr + 2 * info->portwidth)) |
  270. (flash_read8(addr + 3 * info->portwidth) << 8));
  271. #else
  272. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  273. (flash_read8(addr + info->portwidth - 1) << 16) |
  274. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  275. (flash_read8(addr + 3 * info->portwidth - 1)));
  276. #endif
  277. flash_unmap(info, sect, offset, addr);
  278. return retval;
  279. }
  280. /*
  281. * Write a proper sized command to the correct address
  282. */
  283. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  284. uint offset, u32 cmd)
  285. {
  286. void *addr;
  287. cfiword_t cword;
  288. addr = flash_map (info, sect, offset);
  289. flash_make_cmd (info, cmd, &cword);
  290. switch (info->portwidth) {
  291. case FLASH_CFI_8BIT:
  292. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  293. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  294. flash_write8(cword.c, addr);
  295. break;
  296. case FLASH_CFI_16BIT:
  297. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  298. cmd, cword.w,
  299. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  300. flash_write16(cword.w, addr);
  301. break;
  302. case FLASH_CFI_32BIT:
  303. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  304. cmd, cword.l,
  305. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  306. flash_write32(cword.l, addr);
  307. break;
  308. case FLASH_CFI_64BIT:
  309. #ifdef DEBUG
  310. {
  311. char str[20];
  312. print_longlong (str, cword.ll);
  313. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  314. addr, cmd, str,
  315. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  316. }
  317. #endif
  318. flash_write64(cword.ll, addr);
  319. break;
  320. }
  321. /* Ensure all the instructions are fully finished */
  322. sync();
  323. flash_unmap(info, sect, offset, addr);
  324. }
  325. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  326. {
  327. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  328. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  329. }
  330. /*-----------------------------------------------------------------------
  331. */
  332. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  333. uint offset, uchar cmd)
  334. {
  335. void *addr;
  336. cfiword_t cword;
  337. int retval;
  338. addr = flash_map (info, sect, offset);
  339. flash_make_cmd (info, cmd, &cword);
  340. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  341. switch (info->portwidth) {
  342. case FLASH_CFI_8BIT:
  343. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  344. retval = (flash_read8(addr) == cword.c);
  345. break;
  346. case FLASH_CFI_16BIT:
  347. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  348. retval = (flash_read16(addr) == cword.w);
  349. break;
  350. case FLASH_CFI_32BIT:
  351. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  352. retval = (flash_read32(addr) == cword.l);
  353. break;
  354. case FLASH_CFI_64BIT:
  355. #ifdef DEBUG
  356. {
  357. char str1[20];
  358. char str2[20];
  359. print_longlong (str1, flash_read64(addr));
  360. print_longlong (str2, cword.ll);
  361. debug ("is= %s %s\n", str1, str2);
  362. }
  363. #endif
  364. retval = (flash_read64(addr) == cword.ll);
  365. break;
  366. default:
  367. retval = 0;
  368. break;
  369. }
  370. flash_unmap(info, sect, offset, addr);
  371. return retval;
  372. }
  373. /*-----------------------------------------------------------------------
  374. */
  375. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  376. uint offset, uchar cmd)
  377. {
  378. void *addr;
  379. cfiword_t cword;
  380. int retval;
  381. addr = flash_map (info, sect, offset);
  382. flash_make_cmd (info, cmd, &cword);
  383. switch (info->portwidth) {
  384. case FLASH_CFI_8BIT:
  385. retval = ((flash_read8(addr) & cword.c) == cword.c);
  386. break;
  387. case FLASH_CFI_16BIT:
  388. retval = ((flash_read16(addr) & cword.w) == cword.w);
  389. break;
  390. case FLASH_CFI_32BIT:
  391. retval = ((flash_read32(addr) & cword.l) == cword.l);
  392. break;
  393. case FLASH_CFI_64BIT:
  394. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  395. break;
  396. default:
  397. retval = 0;
  398. break;
  399. }
  400. flash_unmap(info, sect, offset, addr);
  401. return retval;
  402. }
  403. /*-----------------------------------------------------------------------
  404. */
  405. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  406. uint offset, uchar cmd)
  407. {
  408. void *addr;
  409. cfiword_t cword;
  410. int retval;
  411. addr = flash_map (info, sect, offset);
  412. flash_make_cmd (info, cmd, &cword);
  413. switch (info->portwidth) {
  414. case FLASH_CFI_8BIT:
  415. retval = flash_read8(addr) != flash_read8(addr);
  416. break;
  417. case FLASH_CFI_16BIT:
  418. retval = flash_read16(addr) != flash_read16(addr);
  419. break;
  420. case FLASH_CFI_32BIT:
  421. retval = flash_read32(addr) != flash_read32(addr);
  422. break;
  423. case FLASH_CFI_64BIT:
  424. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  425. (flash_read32(addr+4) != flash_read32(addr+4)) );
  426. break;
  427. default:
  428. retval = 0;
  429. break;
  430. }
  431. flash_unmap(info, sect, offset, addr);
  432. return retval;
  433. }
  434. /*
  435. * flash_is_busy - check to see if the flash is busy
  436. *
  437. * This routine checks the status of the chip and returns true if the
  438. * chip is busy.
  439. */
  440. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  441. {
  442. int retval;
  443. switch (info->vendor) {
  444. case CFI_CMDSET_INTEL_PROG_REGIONS:
  445. case CFI_CMDSET_INTEL_STANDARD:
  446. case CFI_CMDSET_INTEL_EXTENDED:
  447. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  448. break;
  449. case CFI_CMDSET_AMD_STANDARD:
  450. case CFI_CMDSET_AMD_EXTENDED:
  451. #ifdef CONFIG_FLASH_CFI_LEGACY
  452. case CFI_CMDSET_AMD_LEGACY:
  453. #endif
  454. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  455. break;
  456. default:
  457. retval = 0;
  458. }
  459. debug ("flash_is_busy: %d\n", retval);
  460. return retval;
  461. }
  462. /*-----------------------------------------------------------------------
  463. * wait for XSR.7 to be set. Time out with an error if it does not.
  464. * This routine does not set the flash to read-array mode.
  465. */
  466. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  467. ulong tout, char *prompt)
  468. {
  469. ulong start;
  470. #if CONFIG_SYS_HZ != 1000
  471. if ((ulong)CONFIG_SYS_HZ > 100000)
  472. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  473. else
  474. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  475. #endif
  476. /* Wait for command completion */
  477. #ifdef CONFIG_SYS_LOW_RES_TIMER
  478. reset_timer();
  479. #endif
  480. start = get_timer (0);
  481. WATCHDOG_RESET();
  482. while (flash_is_busy (info, sector)) {
  483. if (get_timer (start) > tout) {
  484. printf ("Flash %s timeout at address %lx data %lx\n",
  485. prompt, info->start[sector],
  486. flash_read_long (info, sector, 0));
  487. flash_write_cmd (info, sector, 0, info->cmd_reset);
  488. udelay(1);
  489. return ERR_TIMOUT;
  490. }
  491. udelay (1); /* also triggers watchdog */
  492. }
  493. return ERR_OK;
  494. }
  495. /*-----------------------------------------------------------------------
  496. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  497. * do a full status check.
  498. *
  499. * This routine sets the flash to read-array mode.
  500. */
  501. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  502. ulong tout, char *prompt)
  503. {
  504. int retcode;
  505. retcode = flash_status_check (info, sector, tout, prompt);
  506. switch (info->vendor) {
  507. case CFI_CMDSET_INTEL_PROG_REGIONS:
  508. case CFI_CMDSET_INTEL_EXTENDED:
  509. case CFI_CMDSET_INTEL_STANDARD:
  510. if ((retcode == ERR_OK)
  511. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  512. retcode = ERR_INVAL;
  513. printf ("Flash %s error at address %lx\n", prompt,
  514. info->start[sector]);
  515. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  516. FLASH_STATUS_PSLBS)) {
  517. puts ("Command Sequence Error.\n");
  518. } else if (flash_isset (info, sector, 0,
  519. FLASH_STATUS_ECLBS)) {
  520. puts ("Block Erase Error.\n");
  521. retcode = ERR_NOT_ERASED;
  522. } else if (flash_isset (info, sector, 0,
  523. FLASH_STATUS_PSLBS)) {
  524. puts ("Locking Error\n");
  525. }
  526. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  527. puts ("Block locked.\n");
  528. retcode = ERR_PROTECTED;
  529. }
  530. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  531. puts ("Vpp Low Error.\n");
  532. }
  533. flash_write_cmd (info, sector, 0, info->cmd_reset);
  534. udelay(1);
  535. break;
  536. default:
  537. break;
  538. }
  539. return retcode;
  540. }
  541. static int use_flash_status_poll(flash_info_t *info)
  542. {
  543. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  544. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  545. info->vendor == CFI_CMDSET_AMD_STANDARD)
  546. return 1;
  547. #endif
  548. return 0;
  549. }
  550. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  551. ulong tout, char *prompt)
  552. {
  553. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  554. ulong start;
  555. int ready;
  556. #if CONFIG_SYS_HZ != 1000
  557. if ((ulong)CONFIG_SYS_HZ > 100000)
  558. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  559. else
  560. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  561. #endif
  562. /* Wait for command completion */
  563. #ifdef CONFIG_SYS_LOW_RES_TIMER
  564. reset_timer();
  565. #endif
  566. start = get_timer(0);
  567. WATCHDOG_RESET();
  568. while (1) {
  569. switch (info->portwidth) {
  570. case FLASH_CFI_8BIT:
  571. ready = flash_read8(dst) == flash_read8(src);
  572. break;
  573. case FLASH_CFI_16BIT:
  574. ready = flash_read16(dst) == flash_read16(src);
  575. break;
  576. case FLASH_CFI_32BIT:
  577. ready = flash_read32(dst) == flash_read32(src);
  578. break;
  579. case FLASH_CFI_64BIT:
  580. ready = flash_read64(dst) == flash_read64(src);
  581. break;
  582. default:
  583. ready = 0;
  584. break;
  585. }
  586. if (ready)
  587. break;
  588. if (get_timer(start) > tout) {
  589. printf("Flash %s timeout at address %lx data %lx\n",
  590. prompt, (ulong)dst, (ulong)flash_read8(dst));
  591. return ERR_TIMOUT;
  592. }
  593. udelay(1); /* also triggers watchdog */
  594. }
  595. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  596. return ERR_OK;
  597. }
  598. /*-----------------------------------------------------------------------
  599. */
  600. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  601. {
  602. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  603. unsigned short w;
  604. unsigned int l;
  605. unsigned long long ll;
  606. #endif
  607. switch (info->portwidth) {
  608. case FLASH_CFI_8BIT:
  609. cword->c = c;
  610. break;
  611. case FLASH_CFI_16BIT:
  612. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  613. w = c;
  614. w <<= 8;
  615. cword->w = (cword->w >> 8) | w;
  616. #else
  617. cword->w = (cword->w << 8) | c;
  618. #endif
  619. break;
  620. case FLASH_CFI_32BIT:
  621. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  622. l = c;
  623. l <<= 24;
  624. cword->l = (cword->l >> 8) | l;
  625. #else
  626. cword->l = (cword->l << 8) | c;
  627. #endif
  628. break;
  629. case FLASH_CFI_64BIT:
  630. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  631. ll = c;
  632. ll <<= 56;
  633. cword->ll = (cword->ll >> 8) | ll;
  634. #else
  635. cword->ll = (cword->ll << 8) | c;
  636. #endif
  637. break;
  638. }
  639. }
  640. /*
  641. * Loop through the sector table starting from the previously found sector.
  642. * Searches forwards or backwards, dependent on the passed address.
  643. */
  644. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  645. {
  646. static flash_sect_t saved_sector; /* previously found sector */
  647. static flash_info_t *saved_info; /* previously used flash bank */
  648. flash_sect_t sector = saved_sector;
  649. if ((info != saved_info) || (sector >= info->sector_count))
  650. sector = 0;
  651. while ((info->start[sector] < addr)
  652. && (sector < info->sector_count - 1))
  653. sector++;
  654. while ((info->start[sector] > addr) && (sector > 0))
  655. /*
  656. * also decrements the sector in case of an overshot
  657. * in the first loop
  658. */
  659. sector--;
  660. saved_sector = sector;
  661. saved_info = info;
  662. return sector;
  663. }
  664. /*-----------------------------------------------------------------------
  665. */
  666. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  667. cfiword_t cword)
  668. {
  669. void *dstaddr = (void *)dest;
  670. int flag;
  671. flash_sect_t sect = 0;
  672. char sect_found = 0;
  673. /* Check if Flash is (sufficiently) erased */
  674. switch (info->portwidth) {
  675. case FLASH_CFI_8BIT:
  676. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  677. break;
  678. case FLASH_CFI_16BIT:
  679. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  680. break;
  681. case FLASH_CFI_32BIT:
  682. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  683. break;
  684. case FLASH_CFI_64BIT:
  685. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  686. break;
  687. default:
  688. flag = 0;
  689. break;
  690. }
  691. if (!flag)
  692. return ERR_NOT_ERASED;
  693. /* Disable interrupts which might cause a timeout here */
  694. flag = disable_interrupts ();
  695. switch (info->vendor) {
  696. case CFI_CMDSET_INTEL_PROG_REGIONS:
  697. case CFI_CMDSET_INTEL_EXTENDED:
  698. case CFI_CMDSET_INTEL_STANDARD:
  699. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  700. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  701. break;
  702. case CFI_CMDSET_AMD_EXTENDED:
  703. case CFI_CMDSET_AMD_STANDARD:
  704. sect = find_sector(info, dest);
  705. flash_unlock_seq (info, sect);
  706. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  707. sect_found = 1;
  708. break;
  709. #ifdef CONFIG_FLASH_CFI_LEGACY
  710. case CFI_CMDSET_AMD_LEGACY:
  711. sect = find_sector(info, dest);
  712. flash_unlock_seq (info, 0);
  713. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  714. sect_found = 1;
  715. break;
  716. #endif
  717. }
  718. switch (info->portwidth) {
  719. case FLASH_CFI_8BIT:
  720. flash_write8(cword.c, dstaddr);
  721. break;
  722. case FLASH_CFI_16BIT:
  723. flash_write16(cword.w, dstaddr);
  724. break;
  725. case FLASH_CFI_32BIT:
  726. flash_write32(cword.l, dstaddr);
  727. break;
  728. case FLASH_CFI_64BIT:
  729. flash_write64(cword.ll, dstaddr);
  730. break;
  731. }
  732. /* re-enable interrupts if necessary */
  733. if (flag)
  734. enable_interrupts ();
  735. if (!sect_found)
  736. sect = find_sector (info, dest);
  737. if (use_flash_status_poll(info))
  738. return flash_status_poll(info, &cword, dstaddr,
  739. info->write_tout, "write");
  740. else
  741. return flash_full_status_check(info, sect,
  742. info->write_tout, "write");
  743. }
  744. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  745. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  746. int len)
  747. {
  748. flash_sect_t sector;
  749. int cnt;
  750. int retcode;
  751. void *src = cp;
  752. void *dst = (void *)dest;
  753. void *dst2 = dst;
  754. int flag = 1;
  755. uint offset = 0;
  756. unsigned int shift;
  757. uchar write_cmd;
  758. switch (info->portwidth) {
  759. case FLASH_CFI_8BIT:
  760. shift = 0;
  761. break;
  762. case FLASH_CFI_16BIT:
  763. shift = 1;
  764. break;
  765. case FLASH_CFI_32BIT:
  766. shift = 2;
  767. break;
  768. case FLASH_CFI_64BIT:
  769. shift = 3;
  770. break;
  771. default:
  772. retcode = ERR_INVAL;
  773. goto out_unmap;
  774. }
  775. cnt = len >> shift;
  776. while ((cnt-- > 0) && (flag == 1)) {
  777. switch (info->portwidth) {
  778. case FLASH_CFI_8BIT:
  779. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  780. flash_read8(src));
  781. src += 1, dst2 += 1;
  782. break;
  783. case FLASH_CFI_16BIT:
  784. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  785. flash_read16(src));
  786. src += 2, dst2 += 2;
  787. break;
  788. case FLASH_CFI_32BIT:
  789. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  790. flash_read32(src));
  791. src += 4, dst2 += 4;
  792. break;
  793. case FLASH_CFI_64BIT:
  794. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  795. flash_read64(src));
  796. src += 8, dst2 += 8;
  797. break;
  798. }
  799. }
  800. if (!flag) {
  801. retcode = ERR_NOT_ERASED;
  802. goto out_unmap;
  803. }
  804. src = cp;
  805. sector = find_sector (info, dest);
  806. switch (info->vendor) {
  807. case CFI_CMDSET_INTEL_PROG_REGIONS:
  808. case CFI_CMDSET_INTEL_STANDARD:
  809. case CFI_CMDSET_INTEL_EXTENDED:
  810. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  811. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  812. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  813. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  814. flash_write_cmd (info, sector, 0, write_cmd);
  815. retcode = flash_status_check (info, sector,
  816. info->buffer_write_tout,
  817. "write to buffer");
  818. if (retcode == ERR_OK) {
  819. /* reduce the number of loops by the width of
  820. * the port */
  821. cnt = len >> shift;
  822. flash_write_cmd (info, sector, 0, cnt - 1);
  823. while (cnt-- > 0) {
  824. switch (info->portwidth) {
  825. case FLASH_CFI_8BIT:
  826. flash_write8(flash_read8(src), dst);
  827. src += 1, dst += 1;
  828. break;
  829. case FLASH_CFI_16BIT:
  830. flash_write16(flash_read16(src), dst);
  831. src += 2, dst += 2;
  832. break;
  833. case FLASH_CFI_32BIT:
  834. flash_write32(flash_read32(src), dst);
  835. src += 4, dst += 4;
  836. break;
  837. case FLASH_CFI_64BIT:
  838. flash_write64(flash_read64(src), dst);
  839. src += 8, dst += 8;
  840. break;
  841. default:
  842. retcode = ERR_INVAL;
  843. goto out_unmap;
  844. }
  845. }
  846. flash_write_cmd (info, sector, 0,
  847. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  848. retcode = flash_full_status_check (
  849. info, sector, info->buffer_write_tout,
  850. "buffer write");
  851. }
  852. break;
  853. case CFI_CMDSET_AMD_STANDARD:
  854. case CFI_CMDSET_AMD_EXTENDED:
  855. flash_unlock_seq(info,0);
  856. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  857. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  858. #endif
  859. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  860. cnt = len >> shift;
  861. flash_write_cmd(info, sector, offset, cnt - 1);
  862. switch (info->portwidth) {
  863. case FLASH_CFI_8BIT:
  864. while (cnt-- > 0) {
  865. flash_write8(flash_read8(src), dst);
  866. src += 1, dst += 1;
  867. }
  868. break;
  869. case FLASH_CFI_16BIT:
  870. while (cnt-- > 0) {
  871. flash_write16(flash_read16(src), dst);
  872. src += 2, dst += 2;
  873. }
  874. break;
  875. case FLASH_CFI_32BIT:
  876. while (cnt-- > 0) {
  877. flash_write32(flash_read32(src), dst);
  878. src += 4, dst += 4;
  879. }
  880. break;
  881. case FLASH_CFI_64BIT:
  882. while (cnt-- > 0) {
  883. flash_write64(flash_read64(src), dst);
  884. src += 8, dst += 8;
  885. }
  886. break;
  887. default:
  888. retcode = ERR_INVAL;
  889. goto out_unmap;
  890. }
  891. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  892. if (use_flash_status_poll(info))
  893. retcode = flash_status_poll(info, src - (1 << shift),
  894. dst - (1 << shift),
  895. info->buffer_write_tout,
  896. "buffer write");
  897. else
  898. retcode = flash_full_status_check(info, sector,
  899. info->buffer_write_tout,
  900. "buffer write");
  901. break;
  902. default:
  903. debug ("Unknown Command Set\n");
  904. retcode = ERR_INVAL;
  905. break;
  906. }
  907. out_unmap:
  908. return retcode;
  909. }
  910. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  911. /*-----------------------------------------------------------------------
  912. */
  913. int flash_erase (flash_info_t * info, int s_first, int s_last)
  914. {
  915. int rcode = 0;
  916. int prot;
  917. flash_sect_t sect;
  918. int st;
  919. if (info->flash_id != FLASH_MAN_CFI) {
  920. puts ("Can't erase unknown flash type - aborted\n");
  921. return 1;
  922. }
  923. if ((s_first < 0) || (s_first > s_last)) {
  924. puts ("- no sectors to erase\n");
  925. return 1;
  926. }
  927. prot = 0;
  928. for (sect = s_first; sect <= s_last; ++sect) {
  929. if (info->protect[sect]) {
  930. prot++;
  931. }
  932. }
  933. if (prot) {
  934. printf ("- Warning: %d protected sectors will not be erased!\n",
  935. prot);
  936. } else if (flash_verbose) {
  937. putc ('\n');
  938. }
  939. for (sect = s_first; sect <= s_last; sect++) {
  940. if (ctrlc()) {
  941. printf("\n");
  942. return 1;
  943. }
  944. if (info->protect[sect] == 0) { /* not protected */
  945. #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
  946. int k;
  947. int size;
  948. int erased;
  949. u32 *flash;
  950. /*
  951. * Check if whole sector is erased
  952. */
  953. size = flash_sector_size(info, sect);
  954. erased = 1;
  955. flash = (u32 *)info->start[sect];
  956. /* divide by 4 for longword access */
  957. size = size >> 2;
  958. for (k = 0; k < size; k++) {
  959. if (flash_read32(flash++) != 0xffffffff) {
  960. erased = 0;
  961. break;
  962. }
  963. }
  964. if (erased) {
  965. if (flash_verbose)
  966. putc(',');
  967. continue;
  968. }
  969. #endif
  970. switch (info->vendor) {
  971. case CFI_CMDSET_INTEL_PROG_REGIONS:
  972. case CFI_CMDSET_INTEL_STANDARD:
  973. case CFI_CMDSET_INTEL_EXTENDED:
  974. flash_write_cmd (info, sect, 0,
  975. FLASH_CMD_CLEAR_STATUS);
  976. flash_write_cmd (info, sect, 0,
  977. FLASH_CMD_BLOCK_ERASE);
  978. flash_write_cmd (info, sect, 0,
  979. FLASH_CMD_ERASE_CONFIRM);
  980. break;
  981. case CFI_CMDSET_AMD_STANDARD:
  982. case CFI_CMDSET_AMD_EXTENDED:
  983. flash_unlock_seq (info, sect);
  984. flash_write_cmd (info, sect,
  985. info->addr_unlock1,
  986. AMD_CMD_ERASE_START);
  987. flash_unlock_seq (info, sect);
  988. flash_write_cmd (info, sect, 0,
  989. info->cmd_erase_sector);
  990. break;
  991. #ifdef CONFIG_FLASH_CFI_LEGACY
  992. case CFI_CMDSET_AMD_LEGACY:
  993. flash_unlock_seq (info, 0);
  994. flash_write_cmd (info, 0, info->addr_unlock1,
  995. AMD_CMD_ERASE_START);
  996. flash_unlock_seq (info, 0);
  997. flash_write_cmd (info, sect, 0,
  998. AMD_CMD_ERASE_SECTOR);
  999. break;
  1000. #endif
  1001. default:
  1002. debug ("Unkown flash vendor %d\n",
  1003. info->vendor);
  1004. break;
  1005. }
  1006. if (use_flash_status_poll(info)) {
  1007. cfiword_t cword;
  1008. void *dest;
  1009. cword.ll = 0xffffffffffffffffULL;
  1010. dest = flash_map(info, sect, 0);
  1011. st = flash_status_poll(info, &cword, dest,
  1012. info->erase_blk_tout, "erase");
  1013. flash_unmap(info, sect, 0, dest);
  1014. } else
  1015. st = flash_full_status_check(info, sect,
  1016. info->erase_blk_tout,
  1017. "erase");
  1018. if (st)
  1019. rcode = 1;
  1020. else if (flash_verbose)
  1021. putc ('.');
  1022. }
  1023. }
  1024. if (flash_verbose)
  1025. puts (" done\n");
  1026. return rcode;
  1027. }
  1028. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1029. static int sector_erased(flash_info_t *info, int i)
  1030. {
  1031. int k;
  1032. int size;
  1033. u32 *flash;
  1034. /*
  1035. * Check if whole sector is erased
  1036. */
  1037. size = flash_sector_size(info, i);
  1038. flash = (u32 *)info->start[i];
  1039. /* divide by 4 for longword access */
  1040. size = size >> 2;
  1041. for (k = 0; k < size; k++) {
  1042. if (flash_read32(flash++) != 0xffffffff)
  1043. return 0; /* not erased */
  1044. }
  1045. return 1; /* erased */
  1046. }
  1047. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1048. void flash_print_info (flash_info_t * info)
  1049. {
  1050. int i;
  1051. if (info->flash_id != FLASH_MAN_CFI) {
  1052. puts ("missing or unknown FLASH type\n");
  1053. return;
  1054. }
  1055. printf ("%s flash (%d x %d)",
  1056. info->name,
  1057. (info->portwidth << 3), (info->chipwidth << 3));
  1058. if (info->size < 1024*1024)
  1059. printf (" Size: %ld kB in %d Sectors\n",
  1060. info->size >> 10, info->sector_count);
  1061. else
  1062. printf (" Size: %ld MB in %d Sectors\n",
  1063. info->size >> 20, info->sector_count);
  1064. printf (" ");
  1065. switch (info->vendor) {
  1066. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1067. printf ("Intel Prog Regions");
  1068. break;
  1069. case CFI_CMDSET_INTEL_STANDARD:
  1070. printf ("Intel Standard");
  1071. break;
  1072. case CFI_CMDSET_INTEL_EXTENDED:
  1073. printf ("Intel Extended");
  1074. break;
  1075. case CFI_CMDSET_AMD_STANDARD:
  1076. printf ("AMD Standard");
  1077. break;
  1078. case CFI_CMDSET_AMD_EXTENDED:
  1079. printf ("AMD Extended");
  1080. break;
  1081. #ifdef CONFIG_FLASH_CFI_LEGACY
  1082. case CFI_CMDSET_AMD_LEGACY:
  1083. printf ("AMD Legacy");
  1084. break;
  1085. #endif
  1086. default:
  1087. printf ("Unknown (%d)", info->vendor);
  1088. break;
  1089. }
  1090. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1091. info->manufacturer_id);
  1092. printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1093. info->device_id);
  1094. if ((info->device_id & 0xff) == 0x7E) {
  1095. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1096. info->device_id2);
  1097. }
  1098. if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
  1099. printf("\n Advanced Sector Protection (PPB) enabled");
  1100. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1101. info->erase_blk_tout,
  1102. info->write_tout);
  1103. if (info->buffer_size > 1) {
  1104. printf (" Buffer write timeout: %ld ms, "
  1105. "buffer size: %d bytes\n",
  1106. info->buffer_write_tout,
  1107. info->buffer_size);
  1108. }
  1109. puts ("\n Sector Start Addresses:");
  1110. for (i = 0; i < info->sector_count; ++i) {
  1111. if (ctrlc())
  1112. break;
  1113. if ((i % 5) == 0)
  1114. putc('\n');
  1115. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1116. /* print empty and read-only info */
  1117. printf (" %08lX %c %s ",
  1118. info->start[i],
  1119. sector_erased(info, i) ? 'E' : ' ',
  1120. info->protect[i] ? "RO" : " ");
  1121. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1122. printf (" %08lX %s ",
  1123. info->start[i],
  1124. info->protect[i] ? "RO" : " ");
  1125. #endif
  1126. }
  1127. putc ('\n');
  1128. return;
  1129. }
  1130. /*-----------------------------------------------------------------------
  1131. * This is used in a few places in write_buf() to show programming
  1132. * progress. Making it a function is nasty because it needs to do side
  1133. * effect updates to digit and dots. Repeated code is nasty too, so
  1134. * we define it once here.
  1135. */
  1136. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1137. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1138. if (flash_verbose) { \
  1139. dots -= dots_sub; \
  1140. if ((scale > 0) && (dots <= 0)) { \
  1141. if ((digit % 5) == 0) \
  1142. printf ("%d", digit / 5); \
  1143. else \
  1144. putc ('.'); \
  1145. digit--; \
  1146. dots += scale; \
  1147. } \
  1148. }
  1149. #else
  1150. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1151. #endif
  1152. /*-----------------------------------------------------------------------
  1153. * Copy memory to flash, returns:
  1154. * 0 - OK
  1155. * 1 - write timeout
  1156. * 2 - Flash not erased
  1157. */
  1158. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1159. {
  1160. ulong wp;
  1161. uchar *p;
  1162. int aln;
  1163. cfiword_t cword;
  1164. int i, rc;
  1165. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1166. int buffered_size;
  1167. #endif
  1168. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1169. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1170. int scale = 0;
  1171. int dots = 0;
  1172. /*
  1173. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1174. */
  1175. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1176. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1177. CONFIG_FLASH_SHOW_PROGRESS);
  1178. }
  1179. #endif
  1180. /* get lower aligned address */
  1181. wp = (addr & ~(info->portwidth - 1));
  1182. /* handle unaligned start */
  1183. if ((aln = addr - wp) != 0) {
  1184. cword.l = 0;
  1185. p = (uchar *)wp;
  1186. for (i = 0; i < aln; ++i)
  1187. flash_add_byte (info, &cword, flash_read8(p + i));
  1188. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1189. flash_add_byte (info, &cword, *src++);
  1190. cnt--;
  1191. }
  1192. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1193. flash_add_byte (info, &cword, flash_read8(p + i));
  1194. rc = flash_write_cfiword (info, wp, cword);
  1195. if (rc != 0)
  1196. return rc;
  1197. wp += i;
  1198. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1199. }
  1200. /* handle the aligned part */
  1201. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1202. buffered_size = (info->portwidth / info->chipwidth);
  1203. buffered_size *= info->buffer_size;
  1204. while (cnt >= info->portwidth) {
  1205. /* prohibit buffer write when buffer_size is 1 */
  1206. if (info->buffer_size == 1) {
  1207. cword.l = 0;
  1208. for (i = 0; i < info->portwidth; i++)
  1209. flash_add_byte (info, &cword, *src++);
  1210. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1211. return rc;
  1212. wp += info->portwidth;
  1213. cnt -= info->portwidth;
  1214. continue;
  1215. }
  1216. /* write buffer until next buffered_size aligned boundary */
  1217. i = buffered_size - (wp % buffered_size);
  1218. if (i > cnt)
  1219. i = cnt;
  1220. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1221. return rc;
  1222. i -= i & (info->portwidth - 1);
  1223. wp += i;
  1224. src += i;
  1225. cnt -= i;
  1226. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1227. /* Only check every once in a while */
  1228. if ((cnt & 0xFFFF) < buffered_size && ctrlc())
  1229. return ERR_ABORTED;
  1230. }
  1231. #else
  1232. while (cnt >= info->portwidth) {
  1233. cword.l = 0;
  1234. for (i = 0; i < info->portwidth; i++) {
  1235. flash_add_byte (info, &cword, *src++);
  1236. }
  1237. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1238. return rc;
  1239. wp += info->portwidth;
  1240. cnt -= info->portwidth;
  1241. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1242. /* Only check every once in a while */
  1243. if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
  1244. return ERR_ABORTED;
  1245. }
  1246. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1247. if (cnt == 0) {
  1248. return (0);
  1249. }
  1250. /*
  1251. * handle unaligned tail bytes
  1252. */
  1253. cword.l = 0;
  1254. p = (uchar *)wp;
  1255. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1256. flash_add_byte (info, &cword, *src++);
  1257. --cnt;
  1258. }
  1259. for (; i < info->portwidth; ++i)
  1260. flash_add_byte (info, &cword, flash_read8(p + i));
  1261. return flash_write_cfiword (info, wp, cword);
  1262. }
  1263. static inline int manufact_match(flash_info_t *info, u32 manu)
  1264. {
  1265. return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
  1266. }
  1267. /*-----------------------------------------------------------------------
  1268. */
  1269. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1270. static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
  1271. {
  1272. if (manufact_match(info, INTEL_MANUFACT)
  1273. && info->device_id == NUMONYX_256MBIT) {
  1274. /*
  1275. * see errata called
  1276. * "Numonyx Axcell P33/P30 Specification Update" :)
  1277. */
  1278. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
  1279. if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
  1280. prot)) {
  1281. /*
  1282. * cmd must come before FLASH_CMD_PROTECT + 20us
  1283. * Disable interrupts which might cause a timeout here.
  1284. */
  1285. int flag = disable_interrupts();
  1286. unsigned short cmd;
  1287. if (prot)
  1288. cmd = FLASH_CMD_PROTECT_SET;
  1289. else
  1290. cmd = FLASH_CMD_PROTECT_CLEAR;
  1291. flash_write_cmd(info, sector, 0,
  1292. FLASH_CMD_PROTECT);
  1293. flash_write_cmd(info, sector, 0, cmd);
  1294. /* re-enable interrupts if necessary */
  1295. if (flag)
  1296. enable_interrupts();
  1297. }
  1298. return 1;
  1299. }
  1300. return 0;
  1301. }
  1302. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1303. {
  1304. int retcode = 0;
  1305. switch (info->vendor) {
  1306. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1307. case CFI_CMDSET_INTEL_STANDARD:
  1308. case CFI_CMDSET_INTEL_EXTENDED:
  1309. if (!cfi_protect_bugfix(info, sector, prot)) {
  1310. flash_write_cmd(info, sector, 0,
  1311. FLASH_CMD_CLEAR_STATUS);
  1312. flash_write_cmd(info, sector, 0,
  1313. FLASH_CMD_PROTECT);
  1314. if (prot)
  1315. flash_write_cmd(info, sector, 0,
  1316. FLASH_CMD_PROTECT_SET);
  1317. else
  1318. flash_write_cmd(info, sector, 0,
  1319. FLASH_CMD_PROTECT_CLEAR);
  1320. }
  1321. break;
  1322. case CFI_CMDSET_AMD_EXTENDED:
  1323. case CFI_CMDSET_AMD_STANDARD:
  1324. /* U-Boot only checks the first byte */
  1325. if (manufact_match(info, ATM_MANUFACT)) {
  1326. if (prot) {
  1327. flash_unlock_seq (info, 0);
  1328. flash_write_cmd (info, 0,
  1329. info->addr_unlock1,
  1330. ATM_CMD_SOFTLOCK_START);
  1331. flash_unlock_seq (info, 0);
  1332. flash_write_cmd (info, sector, 0,
  1333. ATM_CMD_LOCK_SECT);
  1334. } else {
  1335. flash_write_cmd (info, 0,
  1336. info->addr_unlock1,
  1337. AMD_CMD_UNLOCK_START);
  1338. if (info->device_id == ATM_ID_BV6416)
  1339. flash_write_cmd (info, sector,
  1340. 0, ATM_CMD_UNLOCK_SECT);
  1341. }
  1342. }
  1343. if (info->legacy_unlock) {
  1344. int flag = disable_interrupts();
  1345. int lock_flag;
  1346. flash_unlock_seq(info, 0);
  1347. flash_write_cmd(info, 0, info->addr_unlock1,
  1348. AMD_CMD_SET_PPB_ENTRY);
  1349. lock_flag = flash_isset(info, sector, 0, 0x01);
  1350. if (prot) {
  1351. if (lock_flag) {
  1352. flash_write_cmd(info, sector, 0,
  1353. AMD_CMD_PPB_LOCK_BC1);
  1354. flash_write_cmd(info, sector, 0,
  1355. AMD_CMD_PPB_LOCK_BC2);
  1356. }
  1357. debug("sector %ld %slocked\n", sector,
  1358. lock_flag ? "" : "already ");
  1359. } else {
  1360. if (!lock_flag) {
  1361. debug("unlock %ld\n", sector);
  1362. flash_write_cmd(info, 0, 0,
  1363. AMD_CMD_PPB_UNLOCK_BC1);
  1364. flash_write_cmd(info, 0, 0,
  1365. AMD_CMD_PPB_UNLOCK_BC2);
  1366. }
  1367. debug("sector %ld %sunlocked\n", sector,
  1368. !lock_flag ? "" : "already ");
  1369. }
  1370. if (flag)
  1371. enable_interrupts();
  1372. if (flash_status_check(info, sector,
  1373. info->erase_blk_tout,
  1374. prot ? "protect" : "unprotect"))
  1375. printf("status check error\n");
  1376. flash_write_cmd(info, 0, 0,
  1377. AMD_CMD_SET_PPB_EXIT_BC1);
  1378. flash_write_cmd(info, 0, 0,
  1379. AMD_CMD_SET_PPB_EXIT_BC2);
  1380. }
  1381. break;
  1382. #ifdef CONFIG_FLASH_CFI_LEGACY
  1383. case CFI_CMDSET_AMD_LEGACY:
  1384. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1385. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1386. if (prot)
  1387. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1388. else
  1389. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1390. #endif
  1391. };
  1392. /*
  1393. * Flash needs to be in status register read mode for
  1394. * flash_full_status_check() to work correctly
  1395. */
  1396. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  1397. if ((retcode =
  1398. flash_full_status_check (info, sector, info->erase_blk_tout,
  1399. prot ? "protect" : "unprotect")) == 0) {
  1400. info->protect[sector] = prot;
  1401. /*
  1402. * On some of Intel's flash chips (marked via legacy_unlock)
  1403. * unprotect unprotects all locking.
  1404. */
  1405. if ((prot == 0) && (info->legacy_unlock)) {
  1406. flash_sect_t i;
  1407. for (i = 0; i < info->sector_count; i++) {
  1408. if (info->protect[i])
  1409. flash_real_protect (info, i, 1);
  1410. }
  1411. }
  1412. }
  1413. return retcode;
  1414. }
  1415. /*-----------------------------------------------------------------------
  1416. * flash_read_user_serial - read the OneTimeProgramming cells
  1417. */
  1418. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1419. int len)
  1420. {
  1421. uchar *src;
  1422. uchar *dst;
  1423. dst = buffer;
  1424. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1425. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1426. memcpy (dst, src + offset, len);
  1427. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1428. udelay(1);
  1429. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1430. }
  1431. /*
  1432. * flash_read_factory_serial - read the device Id from the protection area
  1433. */
  1434. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1435. int len)
  1436. {
  1437. uchar *src;
  1438. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1439. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1440. memcpy (buffer, src + offset, len);
  1441. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1442. udelay(1);
  1443. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1444. }
  1445. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1446. /*-----------------------------------------------------------------------
  1447. * Reverse the order of the erase regions in the CFI QRY structure.
  1448. * This is needed for chips that are either a) correctly detected as
  1449. * top-boot, or b) buggy.
  1450. */
  1451. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1452. {
  1453. unsigned int i, j;
  1454. u32 tmp;
  1455. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1456. tmp = get_unaligned(&(qry->erase_region_info[i]));
  1457. put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
  1458. &(qry->erase_region_info[i]));
  1459. put_unaligned(tmp, &(qry->erase_region_info[j]));
  1460. }
  1461. }
  1462. /*-----------------------------------------------------------------------
  1463. * read jedec ids from device and set corresponding fields in info struct
  1464. *
  1465. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1466. *
  1467. */
  1468. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1469. {
  1470. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1471. udelay(1);
  1472. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1473. udelay(1000); /* some flash are slow to respond */
  1474. info->manufacturer_id = flash_read_uchar (info,
  1475. FLASH_OFFSET_MANUFACTURER_ID);
  1476. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1477. flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
  1478. flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
  1479. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1480. }
  1481. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1482. {
  1483. info->cmd_reset = FLASH_CMD_RESET;
  1484. cmdset_intel_read_jedec_ids(info);
  1485. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1486. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1487. /* read legacy lock/unlock bit from intel flash */
  1488. if (info->ext_addr) {
  1489. info->legacy_unlock = flash_read_uchar (info,
  1490. info->ext_addr + 5) & 0x08;
  1491. }
  1492. #endif
  1493. return 0;
  1494. }
  1495. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1496. {
  1497. ushort bankId = 0;
  1498. uchar manuId;
  1499. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1500. flash_unlock_seq(info, 0);
  1501. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1502. udelay(1000); /* some flash are slow to respond */
  1503. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1504. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1505. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1506. bankId += 0x100;
  1507. manuId = flash_read_uchar (info,
  1508. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1509. }
  1510. info->manufacturer_id = manuId;
  1511. switch (info->chipwidth){
  1512. case FLASH_CFI_8BIT:
  1513. info->device_id = flash_read_uchar (info,
  1514. FLASH_OFFSET_DEVICE_ID);
  1515. if (info->device_id == 0x7E) {
  1516. /* AMD 3-byte (expanded) device ids */
  1517. info->device_id2 = flash_read_uchar (info,
  1518. FLASH_OFFSET_DEVICE_ID2);
  1519. info->device_id2 <<= 8;
  1520. info->device_id2 |= flash_read_uchar (info,
  1521. FLASH_OFFSET_DEVICE_ID3);
  1522. }
  1523. break;
  1524. case FLASH_CFI_16BIT:
  1525. info->device_id = flash_read_word (info,
  1526. FLASH_OFFSET_DEVICE_ID);
  1527. if ((info->device_id & 0xff) == 0x7E) {
  1528. /* AMD 3-byte (expanded) device ids */
  1529. info->device_id2 = flash_read_uchar (info,
  1530. FLASH_OFFSET_DEVICE_ID2);
  1531. info->device_id2 <<= 8;
  1532. info->device_id2 |= flash_read_uchar (info,
  1533. FLASH_OFFSET_DEVICE_ID3);
  1534. }
  1535. break;
  1536. default:
  1537. break;
  1538. }
  1539. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1540. udelay(1);
  1541. }
  1542. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1543. {
  1544. info->cmd_reset = AMD_CMD_RESET;
  1545. info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
  1546. cmdset_amd_read_jedec_ids(info);
  1547. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1548. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1549. if (info->ext_addr) {
  1550. /* read sector protect/unprotect scheme (at 0x49) */
  1551. if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
  1552. info->legacy_unlock = 1;
  1553. }
  1554. #endif
  1555. return 0;
  1556. }
  1557. #ifdef CONFIG_FLASH_CFI_LEGACY
  1558. static void flash_read_jedec_ids (flash_info_t * info)
  1559. {
  1560. info->manufacturer_id = 0;
  1561. info->device_id = 0;
  1562. info->device_id2 = 0;
  1563. switch (info->vendor) {
  1564. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1565. case CFI_CMDSET_INTEL_STANDARD:
  1566. case CFI_CMDSET_INTEL_EXTENDED:
  1567. cmdset_intel_read_jedec_ids(info);
  1568. break;
  1569. case CFI_CMDSET_AMD_STANDARD:
  1570. case CFI_CMDSET_AMD_EXTENDED:
  1571. cmdset_amd_read_jedec_ids(info);
  1572. break;
  1573. default:
  1574. break;
  1575. }
  1576. }
  1577. /*-----------------------------------------------------------------------
  1578. * Call board code to request info about non-CFI flash.
  1579. * board_flash_get_legacy needs to fill in at least:
  1580. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1581. */
  1582. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1583. {
  1584. flash_info_t *info = &flash_info[banknum];
  1585. if (board_flash_get_legacy(base, banknum, info)) {
  1586. /* board code may have filled info completely. If not, we
  1587. use JEDEC ID probing. */
  1588. if (!info->vendor) {
  1589. int modes[] = {
  1590. CFI_CMDSET_AMD_STANDARD,
  1591. CFI_CMDSET_INTEL_STANDARD
  1592. };
  1593. int i;
  1594. for (i = 0; i < ARRAY_SIZE(modes); i++) {
  1595. info->vendor = modes[i];
  1596. info->start[0] =
  1597. (ulong)map_physmem(base,
  1598. info->portwidth,
  1599. MAP_NOCACHE);
  1600. if (info->portwidth == FLASH_CFI_8BIT
  1601. && info->interface == FLASH_CFI_X8X16) {
  1602. info->addr_unlock1 = 0x2AAA;
  1603. info->addr_unlock2 = 0x5555;
  1604. } else {
  1605. info->addr_unlock1 = 0x5555;
  1606. info->addr_unlock2 = 0x2AAA;
  1607. }
  1608. flash_read_jedec_ids(info);
  1609. debug("JEDEC PROBE: ID %x %x %x\n",
  1610. info->manufacturer_id,
  1611. info->device_id,
  1612. info->device_id2);
  1613. if (jedec_flash_match(info, info->start[0]))
  1614. break;
  1615. else
  1616. unmap_physmem((void *)info->start[0],
  1617. info->portwidth);
  1618. }
  1619. }
  1620. switch(info->vendor) {
  1621. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1622. case CFI_CMDSET_INTEL_STANDARD:
  1623. case CFI_CMDSET_INTEL_EXTENDED:
  1624. info->cmd_reset = FLASH_CMD_RESET;
  1625. break;
  1626. case CFI_CMDSET_AMD_STANDARD:
  1627. case CFI_CMDSET_AMD_EXTENDED:
  1628. case CFI_CMDSET_AMD_LEGACY:
  1629. info->cmd_reset = AMD_CMD_RESET;
  1630. break;
  1631. }
  1632. info->flash_id = FLASH_MAN_CFI;
  1633. return 1;
  1634. }
  1635. return 0; /* use CFI */
  1636. }
  1637. #else
  1638. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1639. {
  1640. return 0; /* use CFI */
  1641. }
  1642. #endif
  1643. /*-----------------------------------------------------------------------
  1644. * detect if flash is compatible with the Common Flash Interface (CFI)
  1645. * http://www.jedec.org/download/search/jesd68.pdf
  1646. */
  1647. static void flash_read_cfi (flash_info_t *info, void *buf,
  1648. unsigned int start, size_t len)
  1649. {
  1650. u8 *p = buf;
  1651. unsigned int i;
  1652. for (i = 0; i < len; i++)
  1653. p[i] = flash_read_uchar(info, start + i);
  1654. }
  1655. static void __flash_cmd_reset(flash_info_t *info)
  1656. {
  1657. /*
  1658. * We do not yet know what kind of commandset to use, so we issue
  1659. * the reset command in both Intel and AMD variants, in the hope
  1660. * that AMD flash roms ignore the Intel command.
  1661. */
  1662. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1663. udelay(1);
  1664. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1665. }
  1666. void flash_cmd_reset(flash_info_t *info)
  1667. __attribute__((weak,alias("__flash_cmd_reset")));
  1668. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1669. {
  1670. int cfi_offset;
  1671. /* Issue FLASH reset command */
  1672. flash_cmd_reset(info);
  1673. for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
  1674. cfi_offset++) {
  1675. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1676. FLASH_CMD_CFI);
  1677. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1678. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1679. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1680. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1681. sizeof(struct cfi_qry));
  1682. info->interface = le16_to_cpu(qry->interface_desc);
  1683. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1684. debug ("device interface is %d\n",
  1685. info->interface);
  1686. debug ("found port %d chip %d ",
  1687. info->portwidth, info->chipwidth);
  1688. debug ("port %d bits chip %d bits\n",
  1689. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1690. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1691. /* calculate command offsets as in the Linux driver */
  1692. info->addr_unlock1 = 0x555;
  1693. info->addr_unlock2 = 0x2aa;
  1694. /*
  1695. * modify the unlock address if we are
  1696. * in compatibility mode
  1697. */
  1698. if ( /* x8/x16 in x8 mode */
  1699. ((info->chipwidth == FLASH_CFI_BY8) &&
  1700. (info->interface == FLASH_CFI_X8X16)) ||
  1701. /* x16/x32 in x16 mode */
  1702. ((info->chipwidth == FLASH_CFI_BY16) &&
  1703. (info->interface == FLASH_CFI_X16X32)))
  1704. {
  1705. info->addr_unlock1 = 0xaaa;
  1706. info->addr_unlock2 = 0x555;
  1707. }
  1708. info->name = "CFI conformant";
  1709. return 1;
  1710. }
  1711. }
  1712. return 0;
  1713. }
  1714. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1715. {
  1716. debug ("flash detect cfi\n");
  1717. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1718. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1719. for (info->chipwidth = FLASH_CFI_BY8;
  1720. info->chipwidth <= info->portwidth;
  1721. info->chipwidth <<= 1)
  1722. if (__flash_detect_cfi(info, qry))
  1723. return 1;
  1724. }
  1725. debug ("not found\n");
  1726. return 0;
  1727. }
  1728. /*
  1729. * Manufacturer-specific quirks. Add workarounds for geometry
  1730. * reversal, etc. here.
  1731. */
  1732. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1733. {
  1734. /* check if flash geometry needs reversal */
  1735. if (qry->num_erase_regions > 1) {
  1736. /* reverse geometry if top boot part */
  1737. if (info->cfi_version < 0x3131) {
  1738. /* CFI < 1.1, try to guess from device id */
  1739. if ((info->device_id & 0x80) != 0)
  1740. cfi_reverse_geometry(qry);
  1741. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1742. /* CFI >= 1.1, deduct from top/bottom flag */
  1743. /* note: ext_addr is valid since cfi_version > 0 */
  1744. cfi_reverse_geometry(qry);
  1745. }
  1746. }
  1747. }
  1748. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1749. {
  1750. int reverse_geometry = 0;
  1751. /* Check the "top boot" bit in the PRI */
  1752. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1753. reverse_geometry = 1;
  1754. /* AT49BV6416(T) list the erase regions in the wrong order.
  1755. * However, the device ID is identical with the non-broken
  1756. * AT49BV642D they differ in the high byte.
  1757. */
  1758. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1759. reverse_geometry = !reverse_geometry;
  1760. if (reverse_geometry)
  1761. cfi_reverse_geometry(qry);
  1762. }
  1763. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1764. {
  1765. /* check if flash geometry needs reversal */
  1766. if (qry->num_erase_regions > 1) {
  1767. /* reverse geometry if top boot part */
  1768. if (info->cfi_version < 0x3131) {
  1769. /* CFI < 1.1, guess by device id */
  1770. if (info->device_id == 0x22CA || /* M29W320DT */
  1771. info->device_id == 0x2256 || /* M29W320ET */
  1772. info->device_id == 0x22D7) { /* M29W800DT */
  1773. cfi_reverse_geometry(qry);
  1774. }
  1775. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1776. /* CFI >= 1.1, deduct from top/bottom flag */
  1777. /* note: ext_addr is valid since cfi_version > 0 */
  1778. cfi_reverse_geometry(qry);
  1779. }
  1780. }
  1781. }
  1782. static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
  1783. {
  1784. /*
  1785. * SST, for many recent nor parallel flashes, says they are
  1786. * CFI-conformant. This is not true, since qry struct.
  1787. * reports a std. AMD command set (0x0002), while SST allows to
  1788. * erase two different sector sizes for the same memory.
  1789. * 64KB sector (SST call it block) needs 0x30 to be erased.
  1790. * 4KB sector (SST call it sector) needs 0x50 to be erased.
  1791. * Since CFI query detect the 4KB number of sectors, users expects
  1792. * a sector granularity of 4KB, and it is here set.
  1793. */
  1794. if (info->device_id == 0x5D23 || /* SST39VF3201B */
  1795. info->device_id == 0x5C23) { /* SST39VF3202B */
  1796. /* set sector granularity to 4KB */
  1797. info->cmd_erase_sector=0x50;
  1798. }
  1799. }
  1800. static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
  1801. {
  1802. /*
  1803. * The M29EW devices seem to report the CFI information wrong
  1804. * when it's in 8 bit mode.
  1805. * There's an app note from Numonyx on this issue.
  1806. * So adjust the buffer size for M29EW while operating in 8-bit mode
  1807. */
  1808. if (((qry->max_buf_write_size) > 0x8) &&
  1809. (info->device_id == 0x7E) &&
  1810. (info->device_id2 == 0x2201 ||
  1811. info->device_id2 == 0x2301 ||
  1812. info->device_id2 == 0x2801 ||
  1813. info->device_id2 == 0x4801)) {
  1814. debug("Adjusted buffer size on Numonyx flash"
  1815. " M29EW family in 8 bit mode\n");
  1816. qry->max_buf_write_size = 0x8;
  1817. }
  1818. }
  1819. /*
  1820. * The following code cannot be run from FLASH!
  1821. *
  1822. */
  1823. ulong flash_get_size (phys_addr_t base, int banknum)
  1824. {
  1825. flash_info_t *info = &flash_info[banknum];
  1826. int i, j;
  1827. flash_sect_t sect_cnt;
  1828. phys_addr_t sector;
  1829. unsigned long tmp;
  1830. int size_ratio;
  1831. uchar num_erase_regions;
  1832. int erase_region_size;
  1833. int erase_region_count;
  1834. struct cfi_qry qry;
  1835. unsigned long max_size;
  1836. memset(&qry, 0, sizeof(qry));
  1837. info->ext_addr = 0;
  1838. info->cfi_version = 0;
  1839. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1840. info->legacy_unlock = 0;
  1841. #endif
  1842. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1843. if (flash_detect_cfi (info, &qry)) {
  1844. info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
  1845. info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
  1846. num_erase_regions = qry.num_erase_regions;
  1847. if (info->ext_addr) {
  1848. info->cfi_version = (ushort) flash_read_uchar (info,
  1849. info->ext_addr + 3) << 8;
  1850. info->cfi_version |= (ushort) flash_read_uchar (info,
  1851. info->ext_addr + 4);
  1852. }
  1853. #ifdef DEBUG
  1854. flash_printqry (&qry);
  1855. #endif
  1856. switch (info->vendor) {
  1857. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1858. case CFI_CMDSET_INTEL_STANDARD:
  1859. case CFI_CMDSET_INTEL_EXTENDED:
  1860. cmdset_intel_init(info, &qry);
  1861. break;
  1862. case CFI_CMDSET_AMD_STANDARD:
  1863. case CFI_CMDSET_AMD_EXTENDED:
  1864. cmdset_amd_init(info, &qry);
  1865. break;
  1866. default:
  1867. printf("CFI: Unknown command set 0x%x\n",
  1868. info->vendor);
  1869. /*
  1870. * Unfortunately, this means we don't know how
  1871. * to get the chip back to Read mode. Might
  1872. * as well try an Intel-style reset...
  1873. */
  1874. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1875. return 0;
  1876. }
  1877. /* Do manufacturer-specific fixups */
  1878. switch (info->manufacturer_id) {
  1879. case 0x0001: /* AMD */
  1880. case 0x0037: /* AMIC */
  1881. flash_fixup_amd(info, &qry);
  1882. break;
  1883. case 0x001f:
  1884. flash_fixup_atmel(info, &qry);
  1885. break;
  1886. case 0x0020:
  1887. flash_fixup_stm(info, &qry);
  1888. break;
  1889. case 0x00bf: /* SST */
  1890. flash_fixup_sst(info, &qry);
  1891. break;
  1892. case 0x0089: /* Numonyx */
  1893. flash_fixup_num(info, &qry);
  1894. break;
  1895. }
  1896. debug ("manufacturer is %d\n", info->vendor);
  1897. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1898. debug ("device id is 0x%x\n", info->device_id);
  1899. debug ("device id2 is 0x%x\n", info->device_id2);
  1900. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1901. size_ratio = info->portwidth / info->chipwidth;
  1902. /* if the chip is x8/x16 reduce the ratio by half */
  1903. if ((info->interface == FLASH_CFI_X8X16)
  1904. && (info->chipwidth == FLASH_CFI_BY8)) {
  1905. size_ratio >>= 1;
  1906. }
  1907. debug ("size_ratio %d port %d bits chip %d bits\n",
  1908. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1909. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1910. info->size = 1 << qry.dev_size;
  1911. /* multiply the size by the number of chips */
  1912. info->size *= size_ratio;
  1913. max_size = cfi_flash_bank_size(banknum);
  1914. if (max_size && (info->size > max_size)) {
  1915. debug("[truncated from %ldMiB]", info->size >> 20);
  1916. info->size = max_size;
  1917. }
  1918. debug ("found %d erase regions\n", num_erase_regions);
  1919. sect_cnt = 0;
  1920. sector = base;
  1921. for (i = 0; i < num_erase_regions; i++) {
  1922. if (i > NUM_ERASE_REGIONS) {
  1923. printf ("%d erase regions found, only %d used\n",
  1924. num_erase_regions, NUM_ERASE_REGIONS);
  1925. break;
  1926. }
  1927. tmp = le32_to_cpu(get_unaligned(
  1928. &(qry.erase_region_info[i])));
  1929. debug("erase region %u: 0x%08lx\n", i, tmp);
  1930. erase_region_count = (tmp & 0xffff) + 1;
  1931. tmp >>= 16;
  1932. erase_region_size =
  1933. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1934. debug ("erase_region_count = %d erase_region_size = %d\n",
  1935. erase_region_count, erase_region_size);
  1936. for (j = 0; j < erase_region_count; j++) {
  1937. if (sector - base >= info->size)
  1938. break;
  1939. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1940. printf("ERROR: too many flash sectors\n");
  1941. break;
  1942. }
  1943. info->start[sect_cnt] =
  1944. (ulong)map_physmem(sector,
  1945. info->portwidth,
  1946. MAP_NOCACHE);
  1947. sector += (erase_region_size * size_ratio);
  1948. /*
  1949. * Only read protection status from
  1950. * supported devices (intel...)
  1951. */
  1952. switch (info->vendor) {
  1953. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1954. case CFI_CMDSET_INTEL_EXTENDED:
  1955. case CFI_CMDSET_INTEL_STANDARD:
  1956. /*
  1957. * Set flash to read-id mode. Otherwise
  1958. * reading protected status is not
  1959. * guaranteed.
  1960. */
  1961. flash_write_cmd(info, sect_cnt, 0,
  1962. FLASH_CMD_READ_ID);
  1963. info->protect[sect_cnt] =
  1964. flash_isset (info, sect_cnt,
  1965. FLASH_OFFSET_PROTECT,
  1966. FLASH_STATUS_PROTECT);
  1967. break;
  1968. case CFI_CMDSET_AMD_EXTENDED:
  1969. case CFI_CMDSET_AMD_STANDARD:
  1970. if (!info->legacy_unlock) {
  1971. /* default: not protected */
  1972. info->protect[sect_cnt] = 0;
  1973. break;
  1974. }
  1975. /* Read protection (PPB) from sector */
  1976. flash_write_cmd(info, 0, 0,
  1977. info->cmd_reset);
  1978. flash_unlock_seq(info, 0);
  1979. flash_write_cmd(info, 0,
  1980. info->addr_unlock1,
  1981. FLASH_CMD_READ_ID);
  1982. info->protect[sect_cnt] =
  1983. flash_isset(
  1984. info, sect_cnt,
  1985. FLASH_OFFSET_PROTECT,
  1986. FLASH_STATUS_PROTECT);
  1987. break;
  1988. default:
  1989. /* default: not protected */
  1990. info->protect[sect_cnt] = 0;
  1991. }
  1992. sect_cnt++;
  1993. }
  1994. }
  1995. info->sector_count = sect_cnt;
  1996. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1997. tmp = 1 << qry.block_erase_timeout_typ;
  1998. info->erase_blk_tout = tmp *
  1999. (1 << qry.block_erase_timeout_max);
  2000. tmp = (1 << qry.buf_write_timeout_typ) *
  2001. (1 << qry.buf_write_timeout_max);
  2002. /* round up when converting to ms */
  2003. info->buffer_write_tout = (tmp + 999) / 1000;
  2004. tmp = (1 << qry.word_write_timeout_typ) *
  2005. (1 << qry.word_write_timeout_max);
  2006. /* round up when converting to ms */
  2007. info->write_tout = (tmp + 999) / 1000;
  2008. info->flash_id = FLASH_MAN_CFI;
  2009. if ((info->interface == FLASH_CFI_X8X16) &&
  2010. (info->chipwidth == FLASH_CFI_BY8)) {
  2011. /* XXX - Need to test on x8/x16 in parallel. */
  2012. info->portwidth >>= 1;
  2013. }
  2014. flash_write_cmd (info, 0, 0, info->cmd_reset);
  2015. }
  2016. return (info->size);
  2017. }
  2018. #ifdef CONFIG_FLASH_CFI_MTD
  2019. void flash_set_verbose(uint v)
  2020. {
  2021. flash_verbose = v;
  2022. }
  2023. #endif
  2024. static void cfi_flash_set_config_reg(u32 base, u16 val)
  2025. {
  2026. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  2027. /*
  2028. * Only set this config register if really defined
  2029. * to a valid value (0xffff is invalid)
  2030. */
  2031. if (val == 0xffff)
  2032. return;
  2033. /*
  2034. * Set configuration register. Data is "encrypted" in the 16 lower
  2035. * address bits.
  2036. */
  2037. flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
  2038. flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
  2039. /*
  2040. * Finally issue reset-command to bring device back to
  2041. * read-array mode
  2042. */
  2043. flash_write16(FLASH_CMD_RESET, (void *)base);
  2044. #endif
  2045. }
  2046. /*-----------------------------------------------------------------------
  2047. */
  2048. void flash_protect_default(void)
  2049. {
  2050. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2051. int i;
  2052. struct apl_s {
  2053. ulong start;
  2054. ulong size;
  2055. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  2056. #endif
  2057. /* Monitor protection ON by default */
  2058. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  2059. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  2060. flash_protect(FLAG_PROTECT_SET,
  2061. CONFIG_SYS_MONITOR_BASE,
  2062. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  2063. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  2064. #endif
  2065. /* Environment protection ON by default */
  2066. #ifdef CONFIG_ENV_IS_IN_FLASH
  2067. flash_protect(FLAG_PROTECT_SET,
  2068. CONFIG_ENV_ADDR,
  2069. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  2070. flash_get_info(CONFIG_ENV_ADDR));
  2071. #endif
  2072. /* Redundant environment protection ON by default */
  2073. #ifdef CONFIG_ENV_ADDR_REDUND
  2074. flash_protect(FLAG_PROTECT_SET,
  2075. CONFIG_ENV_ADDR_REDUND,
  2076. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  2077. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  2078. #endif
  2079. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2080. for (i = 0; i < ARRAY_SIZE(apl); i++) {
  2081. debug("autoprotecting from %08lx to %08lx\n",
  2082. apl[i].start, apl[i].start + apl[i].size - 1);
  2083. flash_protect(FLAG_PROTECT_SET,
  2084. apl[i].start,
  2085. apl[i].start + apl[i].size - 1,
  2086. flash_get_info(apl[i].start));
  2087. }
  2088. #endif
  2089. }
  2090. unsigned long flash_init (void)
  2091. {
  2092. unsigned long size = 0;
  2093. int i;
  2094. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2095. /* read environment from EEPROM */
  2096. char s[64];
  2097. getenv_f("unlock", s, sizeof(s));
  2098. #endif
  2099. /* Init: no FLASHes known */
  2100. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  2101. flash_info[i].flash_id = FLASH_UNKNOWN;
  2102. /* Optionally write flash configuration register */
  2103. cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
  2104. cfi_flash_config_reg(i));
  2105. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  2106. flash_get_size(cfi_flash_bank_addr(i), i);
  2107. size += flash_info[i].size;
  2108. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  2109. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  2110. printf ("## Unknown flash on Bank %d "
  2111. "- Size = 0x%08lx = %ld MB\n",
  2112. i+1, flash_info[i].size,
  2113. flash_info[i].size >> 20);
  2114. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  2115. }
  2116. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2117. else if (strcmp(s, "yes") == 0) {
  2118. /*
  2119. * Only the U-Boot image and it's environment
  2120. * is protected, all other sectors are
  2121. * unprotected (unlocked) if flash hardware
  2122. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  2123. * and the environment variable "unlock" is
  2124. * set to "yes".
  2125. */
  2126. if (flash_info[i].legacy_unlock) {
  2127. int k;
  2128. /*
  2129. * Disable legacy_unlock temporarily,
  2130. * since flash_real_protect would
  2131. * relock all other sectors again
  2132. * otherwise.
  2133. */
  2134. flash_info[i].legacy_unlock = 0;
  2135. /*
  2136. * Legacy unlocking (e.g. Intel J3) ->
  2137. * unlock only one sector. This will
  2138. * unlock all sectors.
  2139. */
  2140. flash_real_protect (&flash_info[i], 0, 0);
  2141. flash_info[i].legacy_unlock = 1;
  2142. /*
  2143. * Manually mark other sectors as
  2144. * unlocked (unprotected)
  2145. */
  2146. for (k = 1; k < flash_info[i].sector_count; k++)
  2147. flash_info[i].protect[k] = 0;
  2148. } else {
  2149. /*
  2150. * No legancy unlocking -> unlock all sectors
  2151. */
  2152. flash_protect (FLAG_PROTECT_CLEAR,
  2153. flash_info[i].start[0],
  2154. flash_info[i].start[0]
  2155. + flash_info[i].size - 1,
  2156. &flash_info[i]);
  2157. }
  2158. }
  2159. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  2160. }
  2161. flash_protect_default();
  2162. #ifdef CONFIG_FLASH_CFI_MTD
  2163. cfi_mtd_init();
  2164. #endif
  2165. return (size);
  2166. }