i2c-uclass.c 12 KB

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  1. /*
  2. * Copyright (c) 2014 Google, Inc
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <errno.h>
  9. #include <i2c.h>
  10. #include <malloc.h>
  11. #include <dm/device-internal.h>
  12. #include <dm/lists.h>
  13. #define I2C_MAX_OFFSET_LEN 4
  14. /* Useful debugging function */
  15. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
  16. {
  17. int i;
  18. for (i = 0; i < nmsgs; i++) {
  19. struct i2c_msg *m = &msg[i];
  20. printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W",
  21. msg->addr, msg->len);
  22. if (!(m->flags & I2C_M_RD))
  23. printf(": %x", m->buf[0]);
  24. printf("\n");
  25. }
  26. }
  27. /**
  28. * i2c_setup_offset() - Set up a new message with a chip offset
  29. *
  30. * @chip: Chip to use
  31. * @offset: Byte offset within chip
  32. * @offset_buf: Place to put byte offset
  33. * @msg: Message buffer
  34. * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
  35. * message is still set up but will not contain an offset.
  36. */
  37. static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
  38. uint8_t offset_buf[], struct i2c_msg *msg)
  39. {
  40. int offset_len;
  41. msg->addr = chip->chip_addr;
  42. msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  43. msg->len = chip->offset_len;
  44. msg->buf = offset_buf;
  45. if (!chip->offset_len)
  46. return -EADDRNOTAVAIL;
  47. assert(chip->offset_len <= I2C_MAX_OFFSET_LEN);
  48. offset_len = chip->offset_len;
  49. while (offset_len--)
  50. *offset_buf++ = offset >> (8 * offset_len);
  51. return 0;
  52. }
  53. static int i2c_read_bytewise(struct udevice *dev, uint offset,
  54. uint8_t *buffer, int len)
  55. {
  56. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  57. struct udevice *bus = dev_get_parent(dev);
  58. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  59. struct i2c_msg msg[2], *ptr;
  60. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  61. int ret;
  62. int i;
  63. for (i = 0; i < len; i++) {
  64. if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
  65. return -EINVAL;
  66. ptr = msg + 1;
  67. ptr->addr = chip->chip_addr;
  68. ptr->flags = msg->flags | I2C_M_RD;
  69. ptr->len = 1;
  70. ptr->buf = &buffer[i];
  71. ptr++;
  72. ret = ops->xfer(bus, msg, ptr - msg);
  73. if (ret)
  74. return ret;
  75. }
  76. return 0;
  77. }
  78. static int i2c_write_bytewise(struct udevice *dev, uint offset,
  79. const uint8_t *buffer, int len)
  80. {
  81. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  82. struct udevice *bus = dev_get_parent(dev);
  83. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  84. struct i2c_msg msg[1];
  85. uint8_t buf[I2C_MAX_OFFSET_LEN + 1];
  86. int ret;
  87. int i;
  88. for (i = 0; i < len; i++) {
  89. if (i2c_setup_offset(chip, offset + i, buf, msg))
  90. return -EINVAL;
  91. buf[msg->len++] = buffer[i];
  92. ret = ops->xfer(bus, msg, 1);
  93. if (ret)
  94. return ret;
  95. }
  96. return 0;
  97. }
  98. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
  99. {
  100. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  101. struct udevice *bus = dev_get_parent(dev);
  102. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  103. struct i2c_msg msg[2], *ptr;
  104. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  105. int msg_count;
  106. if (!ops->xfer)
  107. return -ENOSYS;
  108. if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
  109. return i2c_read_bytewise(dev, offset, buffer, len);
  110. ptr = msg;
  111. if (!i2c_setup_offset(chip, offset, offset_buf, ptr))
  112. ptr++;
  113. if (len) {
  114. ptr->addr = chip->chip_addr;
  115. ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  116. ptr->flags |= I2C_M_RD;
  117. ptr->len = len;
  118. ptr->buf = buffer;
  119. ptr++;
  120. }
  121. msg_count = ptr - msg;
  122. return ops->xfer(bus, msg, msg_count);
  123. }
  124. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  125. int len)
  126. {
  127. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  128. struct udevice *bus = dev_get_parent(dev);
  129. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  130. struct i2c_msg msg[1];
  131. if (!ops->xfer)
  132. return -ENOSYS;
  133. if (chip->flags & DM_I2C_CHIP_WR_ADDRESS)
  134. return i2c_write_bytewise(dev, offset, buffer, len);
  135. /*
  136. * The simple approach would be to send two messages here: one to
  137. * set the offset and one to write the bytes. However some drivers
  138. * will not be expecting this, and some chips won't like how the
  139. * driver presents this on the I2C bus.
  140. *
  141. * The API does not support separate offset and data. We could extend
  142. * it with a flag indicating that there is data in the next message
  143. * that needs to be processed in the same transaction. We could
  144. * instead add an additional buffer to each message. For now, handle
  145. * this in the uclass since it isn't clear what the impact on drivers
  146. * would be with this extra complication. Unfortunately this means
  147. * copying the message.
  148. *
  149. * Use the stack for small messages, malloc() for larger ones. We
  150. * need to allow space for the offset (up to 4 bytes) and the message
  151. * itself.
  152. */
  153. if (len < 64) {
  154. uint8_t buf[I2C_MAX_OFFSET_LEN + len];
  155. i2c_setup_offset(chip, offset, buf, msg);
  156. msg->len += len;
  157. memcpy(buf + chip->offset_len, buffer, len);
  158. return ops->xfer(bus, msg, 1);
  159. } else {
  160. uint8_t *buf;
  161. int ret;
  162. buf = malloc(I2C_MAX_OFFSET_LEN + len);
  163. if (!buf)
  164. return -ENOMEM;
  165. i2c_setup_offset(chip, offset, buf, msg);
  166. msg->len += len;
  167. memcpy(buf + chip->offset_len, buffer, len);
  168. ret = ops->xfer(bus, msg, 1);
  169. free(buf);
  170. return ret;
  171. }
  172. }
  173. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
  174. {
  175. struct udevice *bus = dev_get_parent(dev);
  176. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  177. if (!ops->xfer)
  178. return -ENOSYS;
  179. return ops->xfer(bus, msg, nmsgs);
  180. }
  181. int dm_i2c_reg_read(struct udevice *dev, uint offset)
  182. {
  183. uint8_t val;
  184. int ret;
  185. ret = dm_i2c_read(dev, offset, &val, 1);
  186. if (ret < 0)
  187. return ret;
  188. return val;
  189. }
  190. int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
  191. {
  192. uint8_t val = value;
  193. return dm_i2c_write(dev, offset, &val, 1);
  194. }
  195. /**
  196. * i2c_probe_chip() - probe for a chip on a bus
  197. *
  198. * @bus: Bus to probe
  199. * @chip_addr: Chip address to probe
  200. * @flags: Flags for the chip
  201. * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip
  202. * does not respond to probe
  203. */
  204. static int i2c_probe_chip(struct udevice *bus, uint chip_addr,
  205. enum dm_i2c_chip_flags chip_flags)
  206. {
  207. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  208. struct i2c_msg msg[1];
  209. int ret;
  210. if (ops->probe_chip) {
  211. ret = ops->probe_chip(bus, chip_addr, chip_flags);
  212. if (!ret || ret != -ENOSYS)
  213. return ret;
  214. }
  215. if (!ops->xfer)
  216. return -ENOSYS;
  217. /* Probe with a zero-length message */
  218. msg->addr = chip_addr;
  219. msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  220. msg->len = 0;
  221. msg->buf = NULL;
  222. return ops->xfer(bus, msg, 1);
  223. }
  224. static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len,
  225. struct udevice **devp)
  226. {
  227. struct dm_i2c_chip *chip;
  228. char name[30], *str;
  229. struct udevice *dev;
  230. int ret;
  231. snprintf(name, sizeof(name), "generic_%x", chip_addr);
  232. str = strdup(name);
  233. if (!str)
  234. return -ENOMEM;
  235. ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev);
  236. debug("%s: device_bind_driver: ret=%d\n", __func__, ret);
  237. if (ret)
  238. goto err_bind;
  239. /* Tell the device what we know about it */
  240. chip = dev_get_parent_platdata(dev);
  241. chip->chip_addr = chip_addr;
  242. chip->offset_len = offset_len;
  243. ret = device_probe(dev);
  244. debug("%s: device_probe: ret=%d\n", __func__, ret);
  245. if (ret)
  246. goto err_probe;
  247. *devp = dev;
  248. return 0;
  249. err_probe:
  250. /*
  251. * If the device failed to probe, unbind it. There is nothing there
  252. * on the bus so we don't want to leave it lying around
  253. */
  254. device_unbind(dev);
  255. err_bind:
  256. free(str);
  257. return ret;
  258. }
  259. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  260. struct udevice **devp)
  261. {
  262. struct udevice *dev;
  263. debug("%s: Searching bus '%s' for address %02x: ", __func__,
  264. bus->name, chip_addr);
  265. for (device_find_first_child(bus, &dev); dev;
  266. device_find_next_child(&dev)) {
  267. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  268. int ret;
  269. if (chip->chip_addr == chip_addr) {
  270. ret = device_probe(dev);
  271. debug("found, ret=%d\n", ret);
  272. if (ret)
  273. return ret;
  274. *devp = dev;
  275. return 0;
  276. }
  277. }
  278. debug("not found\n");
  279. return i2c_bind_driver(bus, chip_addr, offset_len, devp);
  280. }
  281. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  282. struct udevice **devp)
  283. {
  284. struct udevice *bus;
  285. int ret;
  286. ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
  287. if (ret) {
  288. debug("Cannot find I2C bus %d\n", busnum);
  289. return ret;
  290. }
  291. ret = i2c_get_chip(bus, chip_addr, offset_len, devp);
  292. if (ret) {
  293. debug("Cannot find I2C chip %02x on bus %d\n", chip_addr,
  294. busnum);
  295. return ret;
  296. }
  297. return 0;
  298. }
  299. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  300. struct udevice **devp)
  301. {
  302. int ret;
  303. *devp = NULL;
  304. /* First probe that chip */
  305. ret = i2c_probe_chip(bus, chip_addr, chip_flags);
  306. debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
  307. chip_addr, ret);
  308. if (ret)
  309. return ret;
  310. /* The chip was found, see if we have a driver, and probe it */
  311. ret = i2c_get_chip(bus, chip_addr, 1, devp);
  312. debug("%s: i2c_get_chip: ret=%d\n", __func__, ret);
  313. return ret;
  314. }
  315. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  316. {
  317. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  318. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  319. int ret;
  320. /*
  321. * If we have a method, call it. If not then the driver probably wants
  322. * to deal with speed changes on the next transfer. It can easily read
  323. * the current speed from this uclass
  324. */
  325. if (ops->set_bus_speed) {
  326. ret = ops->set_bus_speed(bus, speed);
  327. if (ret)
  328. return ret;
  329. }
  330. i2c->speed_hz = speed;
  331. return 0;
  332. }
  333. int dm_i2c_get_bus_speed(struct udevice *bus)
  334. {
  335. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  336. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  337. if (!ops->get_bus_speed)
  338. return i2c->speed_hz;
  339. return ops->get_bus_speed(bus);
  340. }
  341. int i2c_set_chip_flags(struct udevice *dev, uint flags)
  342. {
  343. struct udevice *bus = dev->parent;
  344. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  345. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  346. int ret;
  347. if (ops->set_flags) {
  348. ret = ops->set_flags(dev, flags);
  349. if (ret)
  350. return ret;
  351. }
  352. chip->flags = flags;
  353. return 0;
  354. }
  355. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)
  356. {
  357. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  358. *flagsp = chip->flags;
  359. return 0;
  360. }
  361. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)
  362. {
  363. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  364. if (offset_len > I2C_MAX_OFFSET_LEN)
  365. return -EINVAL;
  366. chip->offset_len = offset_len;
  367. return 0;
  368. }
  369. int i2c_get_chip_offset_len(struct udevice *dev)
  370. {
  371. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  372. return chip->offset_len;
  373. }
  374. int i2c_deblock(struct udevice *bus)
  375. {
  376. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  377. /*
  378. * We could implement a software deblocking here if we could get
  379. * access to the GPIOs used by I2C, and switch them to GPIO mode
  380. * and then back to I2C. This is somewhat beyond our powers in
  381. * driver model at present, so for now just fail.
  382. *
  383. * See https://patchwork.ozlabs.org/patch/399040/
  384. */
  385. if (!ops->deblock)
  386. return -ENOSYS;
  387. return ops->deblock(bus);
  388. }
  389. #if CONFIG_IS_ENABLED(OF_CONTROL)
  390. int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip)
  391. {
  392. int addr;
  393. chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len",
  394. 1);
  395. chip->flags = 0;
  396. addr = dev_read_u32_default(dev, "reg", -1);
  397. if (addr == -1) {
  398. debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__,
  399. dev_read_name(dev), dev->name);
  400. return -EINVAL;
  401. }
  402. chip->chip_addr = addr;
  403. return 0;
  404. }
  405. #endif
  406. static int i2c_post_probe(struct udevice *dev)
  407. {
  408. #if CONFIG_IS_ENABLED(OF_CONTROL)
  409. struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
  410. i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
  411. return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
  412. #else
  413. return 0;
  414. #endif
  415. }
  416. static int i2c_child_post_bind(struct udevice *dev)
  417. {
  418. #if CONFIG_IS_ENABLED(OF_CONTROL)
  419. struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
  420. if (!dev_of_valid(dev))
  421. return 0;
  422. return i2c_chip_ofdata_to_platdata(dev, plat);
  423. #else
  424. return 0;
  425. #endif
  426. }
  427. UCLASS_DRIVER(i2c) = {
  428. .id = UCLASS_I2C,
  429. .name = "i2c",
  430. .flags = DM_UC_FLAG_SEQ_ALIAS,
  431. #if CONFIG_IS_ENABLED(OF_CONTROL)
  432. .post_bind = dm_scan_fdt_dev,
  433. #endif
  434. .post_probe = i2c_post_probe,
  435. .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus),
  436. .per_child_platdata_auto_alloc_size = sizeof(struct dm_i2c_chip),
  437. .child_post_bind = i2c_child_post_bind,
  438. };
  439. UCLASS_DRIVER(i2c_generic) = {
  440. .id = UCLASS_I2C_GENERIC,
  441. .name = "i2c_generic",
  442. };
  443. U_BOOT_DRIVER(i2c_generic_chip_drv) = {
  444. .name = "i2c_generic_chip_drv",
  445. .id = UCLASS_I2C_GENERIC,
  446. };