 Mingkai Hu
|
bbc8e053ba
armv8/ls1043a: Implement workaround for erratum A009660
|
%!s(int64=9) %!d(string=hai) anos |
 Shengzhou Liu
|
3e0a0fbbac
armv8/ls1043a: enable workaround for errarum A009942
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%!s(int64=9) %!d(string=hai) anos |
 Ashish kumar
|
7711cc0a06
arm8: ls2080: Move the core errata defines out of board specific file
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%!s(int64=9) %!d(string=hai) anos |
|
Ashish kumar
|
2ea3a448cc
armv8: ls2080a: Implement workaround for core errata 829520, 833471
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%!s(int64=9) %!d(string=hai) anos |
 Shengzhou Liu
|
a994b3deb0
driver/ddr/fsl: Add workaround for A009663
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%!s(int64=9) %!d(string=hai) anos |
|
Shengzhou Liu
|
0d3972cfcd
fsl/ddr: Add workaround for ERRATUM_A009942
|
%!s(int64=9) %!d(string=hai) anos |
 Mingkai Hu
|
0d6faf2bd0
armv8/ls1043a: Implement workaround for PEX erratum A009929
|
%!s(int64=9) %!d(string=hai) anos |
 Aneesh Bansal
|
9711f52806
armv8/ls1043ardb: add SECURE BOOT target for NOR
|
%!s(int64=9) %!d(string=hai) anos |
 York Sun
|
c107c0c05c
armv8: fsl-layerscape: Make DDR non secure in MMU tables
|
%!s(int64=9) %!d(string=hai) anos |
 Shaohui Xie
|
e994dddbbe
armv8/ls1043ardb: Add support for >2GB memory
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%!s(int64=9) %!d(string=hai) anos |
 Prabhakar Kushwaha
|
b401736463
armv8: ls2085a: Add workaround of errata A009635
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%!s(int64=9) %!d(string=hai) anos |
|
York Sun
|
61bd2f75f5
drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3
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%!s(int64=9) %!d(string=hai) anos |
|
Mingkai Hu
|
af523a0d56
pci/layerscape: add support for LS1043A PCIe LUT register access
|
%!s(int64=9) %!d(string=hai) anos |
|
Prabhakar Kushwaha
|
06b5301043
armv8: ls2085a: Add support of LS2085A SoC
|
%!s(int64=9) %!d(string=hai) anos |
|
Prabhakar Kushwaha
|
449372148f
armv8: LS2080A: Rename LS2085A to reflect LS2080A
|
%!s(int64=9) %!d(string=hai) anos |
|
Mingkai Hu
|
8281c58fd4
armv8/fsl_lsch2: Add fsl_lsch2 SoC
|
%!s(int64=9) %!d(string=hai) anos |
|
Mingkai Hu
|
9f3183d2d6
armv8/fsl_lsch3: Change arch to fsl-layerscape
|
%!s(int64=9) %!d(string=hai) anos |
