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U-Boot-1_2_0
U-Boot-1_1_6
U-Boot-1_1_5
LABEL_2006_06_30_2020
LABEL_2006_05_19_1133
LABEL_2006_05_10_1800
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LABEL_2006_03_12_0025
U-Boot-1_1_4
DENX-2005-10-29-2350
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U-Boot-1_1_1
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U-Boot-1_1_0
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U-Boot-1_0_2
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LABEL_2004_01_21_2110
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U-Boot-1_0_1
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U-Boot-0_4_5
U-Boot-0_4_4
U-Boot-0_4_3
U-Boot-0_4_2
U-Boot-0_4_1
LABEL_2003_06_29_0145
LABEL_2003_06_28_1800-stable
LABEL_2003_06_28_0130-stable
LABEL_2003_06_28_0050-stable
LABEL_2003_06_27_2340
U-Boot-0_4_0
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U-Boot-0_3_1
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U-Boot-0_3_0
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LABEL_2003_03_26_1300
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LABEL_2003_03_14_2150
LABEL_2003_03_06_2255
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LABEL_2003_03_06_0200
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LABEL_2002_12_28_1700
LABEL_2002_12_21_0040
U-Boot-0_2_0
LABEL_2002_12_07_0120
LABEL_2002_12_03_2230
LABEL_2002_11_22_0015
LABEL_2002_11_18_0115
LABEL_2002_11_11_2211
LABEL_2002_11_10_2310
LABEL_2002_11_05_1735
LABEL_2002_11_05_0120
U_BOOT_0_1_0
Commit történet
| Szerző | SHA1 Üzenet | Dátum |
|---|---|---|
 Uri Mashiach
|
258bad41ac imx: mx7: DDR controller configuration for the i.MX7 architecture | 7 éve |