Commit History

Autor SHA1 Mensaxe Data
  Paul Burton 939a255a67 MIPS: Make CM GCR base configurable %!s(int64=8) %!d(string=hai) anos
  Paul Burton 4baa0ab67d MIPS: L2 cache support %!s(int64=8) %!d(string=hai) anos
  Paul Burton 8cb4817d0f MIPS: Probe cache line sizes once during boot %!s(int64=8) %!d(string=hai) anos
  Paul Burton a95800e881 MIPS: Fix invalidate_dcache_range to operate on L1 Dcache %!s(int64=9) %!d(string=hai) anos
  Paul Burton fb64cda579 MIPS: Abstract cache op loops with a macro %!s(int64=9) %!d(string=hai) anos
  Paul Burton 372286217f MIPS: Split I & D cache line size config %!s(int64=9) %!d(string=hai) anos
  Paul Burton ace3be4f15 MIPS: Move cache sizes to Kconfig %!s(int64=9) %!d(string=hai) anos
  Marek Vasut fbb0de088b mips: cache: Bulletproof the code against cornercases %!s(int64=9) %!d(string=hai) anos
  Daniel Schwierzeck a3ab2ae7f6 MIPS: sync processor and register definitions with linux-4.4 %!s(int64=9) %!d(string=hai) anos
  Paul Burton 30374f98d1 MIPS: unify cache maintenance functions %!s(int64=10) %!d(string=hai) anos