 Bin Meng
|
3612b1efeb
x86: kconfig: Select ARCH_MISC_INIT in the platform Kconfig
|
7 years ago |
|
Bin Meng
|
30b1ecd265
x86: kconfig: Let board select BOARD_EARLY_INIT_F
|
7 years ago |
 Simon Glass
|
76d1d02fd2
board_f: x86: Use checkcpu() for CPU init
|
8 years ago |
|
Bin Meng
|
1e2f7b9e8e
x86: Call board_final_cleanup() in last_stage_init()
|
9 years ago |
|
Bin Meng
|
5bc60d5a44
x86: coreboot: Convert to use more dm drivers
|
9 years ago |
|
Bin Meng
|
5c564226fc
x86: qemu: Implement PIRQ routing
|
10 years ago |
|
Bin Meng
|
f2653e8dd9
x86: coreboot: Control I/O port 0xb2 writing via device tree
|
10 years ago |
|
Bin Meng
|
65cdd9be3e
x86: coreboot: Fix cosmetic issues
|
10 years ago |
|
Simon Glass
|
069f5481ba
x86: config: Enable hook for saving MRC configuration
|
10 years ago |
|
Simon Glass
|
aff2523f69
x86: Add support for MTRRs
|
10 years ago |
|
Simon Glass
|
65990d5680
x86: Remove board_early_init_r()
|
10 years ago |
|
Simon Glass
|
a49e3c7f09
x86: Make show_boot_progress() common
|
10 years ago |
|
Simon Glass
|
378a8634ad
x86: Tidy up coreboot header usage
|
10 years ago |
|
Simon Glass
|
d1cd045982
x86: Emit post codes in startup code for Chromebooks
|
10 years ago |
|
Simon Glass
|
8ef07571a0
x86: Add chromebook_link board
|
10 years ago |
|
Simon Glass
|
727c1a9871
x86: Replace fill_processor_name() with cpu_get_name()
|
10 years ago |
|
Simon Glass
|
e1ffd81797
x86: Fix up some missing prototypes
|
10 years ago |
|
Simon Glass
|
8b37c7694f
x86: Use the standard arch_cpu_init() function
|
10 years ago |
 Wolfgang Denk
|
3765b3e7bd
Coding Style cleanup: remove trailing white space
|
11 years ago |
|
Wolfgang Denk
|
1a4596601f
Add GPL-2.0+ SPDX-License-Identifier to source files
|
12 years ago |
|
Simon Glass
|
8f0278eab4
x86: Add coreboot timestamps
|
12 years ago |
|
Simon Glass
|
c78a62acdf
x86: Implement panic output for coreboot
|
12 years ago |
|
Simon Glass
|
bc2df1afb9
x86: Permit bootstage and timer data to be used prior to relocation
|
12 years ago |
 Stefan Reinauer
|
c94663170b
x86: drop unused code in coreboot.c
|
12 years ago |
 Vadim Bendebury
|
1350f1cce1
x86: Provide a way to throttle port80 accesses
|
12 years ago |
 Duncan Laurie
|
b83058cd23
x86: Issue SMI to finalize Coreboot in final stage
|
12 years ago |
|
Duncan Laurie
|
488b8b242b
x86: Fix MTRR clear to detect which MTRR to use
|
12 years ago |
|
Stefan Reinauer
|
300081aa68
x86: Emit port 80 post codes in show_boot_progress()
|
12 years ago |
|
Stefan Reinauer
|
17de114f9f
x86: Clean up MTRR 7 right before jumping to the kernel
|
12 years ago |
|
Vadim Bendebury
|
6dbe0cce3f
x86: Enable coreboot timestamp facility support in u-boot.
|
12 years ago |
