作者 | SHA1 備註 | 提交日期 |
---|---|---|
|
e4ff8420c5 arm: socfpga: gen5: combine some init code for SPL and U-Boot | 6 年之前 |
|
c0b4fc1a1b arm: socfpga: cyclone5: handle debug uart | 6 年之前 |
|
20905f5fa6 arm: socfpga: spl_gen5: clean up malloc_base assignment | 6 年之前 |
|
40c36f8d49 arm: socfpga: fix SPL on gen5 after moving to DM serial | 6 年之前 |
|
c859f2a77d arm: socfpga: Restructure the SPL file | 7 年之前 |