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U-Boot-1_2_0
U-Boot-1_1_6
U-Boot-1_1_5
LABEL_2006_06_30_2020
LABEL_2006_05_19_1133
LABEL_2006_05_10_1800
LABEL_2006_04_18_1106
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U-Boot-1_1_4
DENX-2005-10-29-2350
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U-Boot-1_1_3
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U-Boot-0_2_0
LABEL_2002_12_07_0120
LABEL_2002_12_03_2230
LABEL_2002_11_22_0015
LABEL_2002_11_18_0115
LABEL_2002_11_11_2211
LABEL_2002_11_10_2310
LABEL_2002_11_05_1735
LABEL_2002_11_05_0120
U_BOOT_0_1_0
Commit History
| Author | SHA1 Message | Date |
|---|---|---|
 Peng Fan
|
a472e9bd6a imx-common: cache: configure L2 Cache for i.MX6SLL | 8 years ago |
|
Peng Fan
|
ad7af5d7e4 imx6: cache: disable L2 before touching Auxiliary Control Register | 9 years ago |
 Adrian Alonso
|
ab09e72866 arm: imx: common rework cache settings for imx6 | 9 years ago |