coolsoul/u-boot

Drzewo: 65d297af7c

Autor	SHA1 Wiadomość	Data
Daniel Schwierzeck	65d297af7c MIPS: fix iand optimize setup of CP0 registers	9 lat temu
Paul Burton	31d36f748c MIPS: Hang if run on a secondary CPU	8 lat temu
Paul Burton	4baa0ab67d MIPS: L2 cache support	8 lat temu
Paul Burton	4f9226b403 MIPS: Preserve Config implementation-defined bits	8 lat temu
Daniel Schwierzeck	a3ab2ae7f6 MIPS: sync processor and register definitions with linux-4.4	9 lat temu
Chris Packham	73a4152b25 mips: Use unsigned int when reading c0 registers	10 lat temu
Paul Burton	fa476f75bf mips32: detect L1 cache sizes if they're not defined	11 lat temu
Peter Tyser	819833af39 Move architecture-specific includes to arch/$ARCH/include/asm	15 lat temu