提交历史

作者 SHA1 备注 提交日期
  Eugeniy Paltsev 4b5f6c52e7 DW SPI: use 32 bit access instead of 16 and 32 bit mix 7 年之前
  Eugeniy Paltsev bcdcb3e61e DW SPI: add option to use external gpio for chip select 7 年之前
  Eugeniy Paltsev d3d8aaec74 DW SPI: refactor poll_transfer functions 7 年之前
  Eugeniy Paltsev fc282c7bcb DW SPI: fix transmit only mode 7 年之前
  Eugeniy Paltsev c6b4f031d9 DW SPI: fix tx data loss on FIFO flush 7 年之前
  Eugeniy Paltsev 58c125b9e2 DW SPI: Get clock value from Device Tree 7 年之前
  Simon Glass a821c4af79 dm: Rename dev_addr..() functions 8 年之前
  Simon Glass e160f7d430 dm: core: Replace of_offset with accessor 8 年之前
  Jagan Teki 95e77d904e spi: designware_spi: Use GENMASK 9 年之前
  Jagan Teki 431a9f0286 spi: designware_spi: Use BIT macro 9 年之前
  Simon Glass 4e9838c102 dm: Use dev_get_addr() where possible 9 年之前
  Axel Lin 52091ad146 spi: designware_spi: revisit FIFO size detection again 10 年之前
  Simon Glass 19a25f672c dm: spi: Move the per-child data size to the uclass 10 年之前
  Marek Vasut 7411486253 dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi 10 年之前
  Axel Lin 501943696e spi: designware_spi: Fix detecting FIFO depth 10 年之前
  Stefan Roese a72f80208d spi: designware_spi: Some fixes / changes 10 年之前
  Stefan Roese 5bef6fd79f spi: Add designware master SPI DM driver used on SoCFPGA 10 年之前