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Commit History

Author SHA1 Message Date
  Paul Burton fa476f75bf mips32: detect L1 cache sizes if they're not defined 11 years ago
  Gabor Juhos db2c86d7d7 MIPS: mips32/cache.S: use v1 register for indirect function calls 12 years ago
  Gabor Juhos ee8b1e2959 MIPS: mips32/cache.S: store cache line size in t8 register 12 years ago
  Gabor Juhos c325916563 MIPS: mips32/cache.S: save return address in t9 register 12 years ago
  Gabor Juhos da84f33b04 MIPS: mips32/cache.S: remove superfluous register assignment 12 years ago
  Wolfgang Denk 1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files 12 years ago
  Zhi-zhou Zhang cb0a6a1ecc MIPS: don't use camel-case style 12 years ago
  Daniel Schwierzeck 979cfeaf36 MIPS: fix inconsistency in config option for cache operation mode 13 years ago
  Shinya Kuribayashi 7aa1f198c8 MIPS: Coding style cleanups on common assembly files 14 years ago
  Shinya Kuribayashi 522171a087 MIPS: Remove mips_cache_lock() feature 14 years ago
  Daniel Schwierzeck 91809608a4 MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32 14 years ago