Author | SHA1 Message | Date |
---|---|---|
|
f3d7c2fe9d Exynos5420: Add DDR3 initialization for 5420 | 11 years ago |
|
e89278c933 EXYNOS5420: Add dmc and phy_control register structure | 11 years ago |
|
87f2e079db Exynos5: DDR3: Add DDR3 memory setup for Exynos5250 Rev 1.0 | 13 years ago |
|
95c2fb371a EXYNOS: Add structure for Exynos4 DMC | 13 years ago |
|
37bb6d89de ARM: EXYNOS: Add support for Exynos5 based SoCs | 13 years ago |