 Tom Rini
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a78cd86132
ARM: Rework and correct barrier definitions
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%!s(int64=8) %!d(string=hai) anos |
 Beniamino Galvani
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5a07abb370
arm: implement generic PSCI reset call for armv8
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%!s(int64=9) %!d(string=hai) anos |
 Alexander Graf
|
d990f5c834
arm: Add support for HYP mode and LPAE page tables
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%!s(int64=9) %!d(string=hai) anos |
|
Alexander Graf
|
53eb45ef40
arm64: Add 32bit arm compatible dcache definitions
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%!s(int64=9) %!d(string=hai) anos |
|
Alexander Graf
|
7985cdf74b
arm64: Remove non-full-va map code
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%!s(int64=9) %!d(string=hai) anos |
|
Alexander Graf
|
5e2ec773bb
arm64: Make full va map code more dynamic
|
%!s(int64=9) %!d(string=hai) anos |
 Marek Vasut
|
8890c2fbe6
arm: Remove S bit from MMU section entry
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%!s(int64=9) %!d(string=hai) anos |
|
Marek Vasut
|
a592e6fb7f
arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7
|
%!s(int64=9) %!d(string=hai) anos |
 Sergey Temerkhanov
|
a5b9fa30ce
armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure
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%!s(int64=9) %!d(string=hai) anos |
|
Sergey Temerkhanov
|
94f7ff36e5
armv8: New MMU setup code allowing to use 48+ bits PA/VA
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%!s(int64=9) %!d(string=hai) anos |
|
Sergey Temerkhanov
|
ba5648cd91
armv8: Add read_mpidr() function
|
%!s(int64=9) %!d(string=hai) anos |
 Stephen Warren
|
88f965d720
armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY
|
%!s(int64=9) %!d(string=hai) anos |
 Alison Wang
|
53fd4b8c22
arm: mmu: Add missing volatile for reading SCTLR register
|
%!s(int64=9) %!d(string=hai) anos |
 Siva Durga Prasad Paladugu
|
dad17fd510
armv8: caches: Added routine to set non cacheable region
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%!s(int64=10) %!d(string=hai) anos |
 Simon Glass
|
5519912164
arm: Add a prototype for save_boot_params_ret()
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%!s(int64=10) %!d(string=hai) anos |
 Ian Campbell
|
73169874a2
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
|
%!s(int64=10) %!d(string=hai) anos |
 Bryan Brinsko
|
97840b5d1f
ARMv7 TLB: Fixed TTBR0 and Table Descriptors to allow caching
|
%!s(int64=10) %!d(string=hai) anos |
 York Sun
|
dcd468b8f4
armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack
|
%!s(int64=10) %!d(string=hai) anos |
|
Simon Glass
|
e11c6c279d
arm: Allow lr to be saved by board code
|
%!s(int64=10) %!d(string=hai) anos |
 Thierry Reding
|
1dfdd9ba4e
ARM: Implement non-cached memory support
|
%!s(int64=10) %!d(string=hai) anos |
|
Thierry Reding
|
25026fa9f1
ARM: cache-cp15: Use more accurate types
|
%!s(int64=10) %!d(string=hai) anos |
|
Marek Vasut
|
ff7e9700ed
arm: cache: Add support for write-allocate D-Cache
|
%!s(int64=10) %!d(string=hai) anos |
|
York Sun
|
2f78eae506
ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC
|
%!s(int64=11) %!d(string=hai) anos |
|
York Sun
|
1e6ad55c05
armv8/cache: Change cache invalidate and flush function
|
%!s(int64=11) %!d(string=hai) anos |
 David Feng
|
0ae7653128
arm64: core support
|
%!s(int64=11) %!d(string=hai) anos |
 R Sricharan
|
de63ac278c
ARM: mmu: Set domain permissions to client access
|
%!s(int64=12) %!d(string=hai) anos |
 Rob Herring
|
2ff467c051
ARM: add wfi assembly macro
|
%!s(int64=12) %!d(string=hai) anos |
|
Simon Glass
|
0dde7f5379
arm: Add control over cachability of memory regions
|
%!s(int64=12) %!d(string=hai) anos |
 Peter Tyser
|
819833af39
Move architecture-specific includes to arch/$ARCH/include/asm
|
%!s(int64=15) %!d(string=hai) anos |
