 Joe Hershberger
|
1fd92db83d
net: cosmetic: Fix var naming net <-> eth drivers
|
10 years ago |
 Sonic Zhang
|
d227922150
net: Support DMA threshold mode in DWMAC driver
|
10 years ago |
|
Sonic Zhang
|
2ddaf13bd2
net: configure DWMAC DMA by default AXI burst length
|
10 years ago |
 Alexey Brodkin
|
875143f324
net/designware: add error message on DMA reset timeout
|
10 years ago |
 Marek Vasut
|
96cec17d3c
net: dwc: Make the cache handling less cryptic
|
10 years ago |
|
Marek Vasut
|
4f68678b19
net: dwc: Fix cache alignment issues
|
10 years ago |
 Ian Campbell
|
49692c5f51
net/designware: Make DMA burst length configurable and reduce by default
|
11 years ago |
|
Ian Campbell
|
964ea7c1ce
net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGN
|
11 years ago |
|
Ian Campbell
|
1c848a2586
net/designware: ensure device private data is DMA aligned.
|
11 years ago |
|
Ian Campbell
|
15e82e5309
net/designware: call phy_connect_dev() to properly setup phylib device
|
11 years ago |
|
Alexey Brodkin
|
50b0df814b
net/designware: make driver compatible with data cache
|
11 years ago |
|
Alexey Brodkin
|
92a190aaab
net/designware - switch driver to phylib usage
|
11 years ago |
|
Alexey Brodkin
|
74cb708d58
net/designware: add explicit reset of {tx|rx}_currdescnum
|
11 years ago |
|
Alexey Brodkin
|
227ad7b2b6
net: designware: Respect "bus mode" register contents on SW reset
|
11 years ago |
 Wolfgang Denk
|
1a4596601f
Add GPL-2.0+ SPDX-License-Identifier to source files
|
12 years ago |
 Vipin Kumar
|
7091915ad7
net/designware: Do not select MIIPORT for RGMII interface
|
12 years ago |
 Dinh Nguyen
|
66f119e50c
net/designware: Consecutive writes to the same register to be avoided
|
13 years ago |
 Stefan Roese
|
ef76025a99
net: Multiple updates/enhancements to designware.c
|
13 years ago |
|
Vipin Kumar
|
9afc1af01f
SPEAr: Add interface information in initialization
|
13 years ago |
|
Joe Hershberger
|
10cbe3b6a4
net: Fix remaining API interface breakage
|
13 years ago |
 Amit Virdi
|
cafabe1995
net/designware: Change timeout loop implementation
|
13 years ago |
 Armando Visconti
|
20a5dde149
net/designware: Set ANAR to 0x1e1
|
13 years ago |
 Vikas Manocha
|
e25c90b45c
net/designware: Program phy registers when auto-negotiation is ON
|
13 years ago |
|
Vipin Kumar
|
13edd1706c
net/designware: Try configuring phy on each dw_eth_init
|
13 years ago |
|
Armando Visconti
|
aa51005c3f
net/designware: Consecutive writes must have delay
|
13 years ago |
|
Vipin KUMAR
|
024333c96f
net/designware: Phy address fix
|
13 years ago |
|
Vipin KUMAR
|
c7f6dbe736
net/designware: Fix to restore hw mac address
|
13 years ago |
 Simon Glass
|
7616e78508
Add Ethernet hardware MAC address framework to usbnet
|
14 years ago |
 Mike Frysinger
|
f0ece9e934
net: designware: fix uninitialized phy_addr usage
|
14 years ago |
|
Mike Frysinger
|
ee7f5bfd12
net: designware: fix unused warning when CONFIG_DW_AUTONEG is enabled
|
14 years ago |
