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@@ -2162,7 +2162,7 @@ typedef struct ccsr_gur {
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#define MPC85xx_PORDEVSR_SGMII4_DIS 0x04000000
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#define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000
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#define MPC85xx_PORDEVSR_PCI1 0x00800000
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-#if defined(CONFIG_P1013) || defined(CONFIG_P1022)
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+#if defined(CONFIG_P1013) || defined(CONFIG_ARCH_P1022)
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#define MPC85xx_PORDEVSR_IO_SEL 0x007c0000
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#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 18
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#elif defined(CONFIG_P1017) || defined(CONFIG_P1023)
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@@ -2290,7 +2290,7 @@ typedef struct ccsr_gur {
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#define MPC85xx_PMUXCR_QE11 0x00000010
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#define MPC85xx_PMUXCR_QE12 0x00000008
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#endif
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-#if defined(CONFIG_P1013) || defined(CONFIG_P1022)
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+#if defined(CONFIG_P1013) || defined(CONFIG_ARCH_P1022)
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#define MPC85xx_PMUXCR_TDM_MASK 0x0001cc00
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#define MPC85xx_PMUXCR_TDM 0x00014800
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#define MPC85xx_PMUXCR_SPI_MASK 0x00600000
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@@ -2375,7 +2375,7 @@ typedef struct ccsr_gur {
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#define MPC85xx_PMUXCR2_DEBUG_MUX_SEL_USBPHY 0x00002000
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#define MPC85xx_PMUXCR2_PLL_LKDT_EXPOSE 0x00001000
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#endif
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-#if defined(CONFIG_P1013) || defined(CONFIG_P1022)
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+#if defined(CONFIG_P1013) || defined(CONFIG_ARCH_P1022)
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#define MPC85xx_PMUXCR2_ETSECUSB_MASK 0x001f8000
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#define MPC85xx_PMUXCR2_USB 0x00150000
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#endif
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