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@@ -130,7 +130,7 @@ static int read_cpu_temperature(struct udevice *dev)
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#elif defined(CONFIG_MX7)
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#elif defined(CONFIG_MX7)
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static int read_cpu_temperature(struct udevice *dev)
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static int read_cpu_temperature(struct udevice *dev)
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{
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{
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- unsigned int reg, tmp, start;
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+ unsigned int reg, tmp;
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unsigned int raw_25c, te1;
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unsigned int raw_25c, te1;
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int temperature;
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int temperature;
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unsigned int *priv = dev_get_priv(dev);
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unsigned int *priv = dev_get_priv(dev);
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@@ -169,18 +169,25 @@ static int read_cpu_temperature(struct udevice *dev)
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writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr);
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writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr);
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writel(TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_MASK, &ccm_anatop->tempsense1_set);
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writel(TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_MASK, &ccm_anatop->tempsense1_set);
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- start = get_timer(0);
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- /* Wait max 100ms */
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- do {
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+ if (soc_rev() >= CHIP_REV_1_1) {
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+ while ((readl(&ccm_anatop->tempsense1) &
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+ TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK) == 0)
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+ ;
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+ reg = readl(&ccm_anatop->tempsense1);
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+ tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK)
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+ >> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT;
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+ } else {
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/*
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/*
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- * Since we can not rely on finish bit, use 1ms delay to get
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- * temperature. From RM, 17us is enough to get data, but
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- * to gurantee to get the data, delay 100ms here.
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+ * Since we can not rely on finish bit, use 10ms
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+ * delay to get temperature. From RM, 17us is
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+ * enough to get data, but to gurantee to get
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+ * the data, delay 10ms here.
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*/
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*/
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+ udelay(10000);
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reg = readl(&ccm_anatop->tempsense1);
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reg = readl(&ccm_anatop->tempsense1);
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tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK)
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tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK)
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>> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT;
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>> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT;
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- } while (get_timer(0) < (start + 100));
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+ }
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writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr);
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writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr);
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