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@@ -18,6 +18,7 @@
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*/
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*/
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#include <common.h>
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#include <common.h>
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+#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#if defined(CONFIG_CONS_SCIF0)
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#if defined(CONFIG_CONS_SCIF0)
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@@ -132,17 +133,17 @@ void serial_setbrg(void)
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{
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{
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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- *SCBRR = SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ);
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+ writeb(SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ), SCBRR);
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}
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}
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int serial_init(void)
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int serial_init(void)
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{
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{
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- *SCSCR = (SCR_RE | SCR_TE);
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- *SCSMR = 0;
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- *SCSMR = 0;
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- *SCFCR = (FCR_RFRST | FCR_TFRST);
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- *SCFCR;
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- *SCFCR = 0;
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+ writew((SCR_RE | SCR_TE), SCSCR);
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+ writew(0, SCSMR);
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+ writew(0, SCSMR);
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+ writew((FCR_RFRST | FCR_TFRST), SCFCR);
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+ readw(SCFCR);
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+ writew(0, SCFCR);
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serial_setbrg();
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serial_setbrg();
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return 0;
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return 0;
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@@ -151,9 +152,9 @@ int serial_init(void)
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static int serial_rx_fifo_level(void)
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static int serial_rx_fifo_level(void)
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{
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{
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#if defined(SCRFDR)
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#if defined(SCRFDR)
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- return (*SCRFDR >> 0) & FIFOLEVEL_MASK;
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+ return (readw(SCRFDR) >> 0) & FIFOLEVEL_MASK;
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#else
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#else
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- return (*SCFDR >> 0) & FIFOLEVEL_MASK;
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+ return (readw(SCFDR) >> 0) & FIFOLEVEL_MASK;
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#endif
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#endif
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}
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}
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@@ -162,15 +163,15 @@ void serial_raw_putc(const char c)
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unsigned int fsr_bits_to_clear;
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unsigned int fsr_bits_to_clear;
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while (1) {
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while (1) {
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- if (*SCFSR & FSR_TEND) { /* Tx fifo is empty */
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+ if (readw(SCFSR) & FSR_TEND) { /* Tx fifo is empty */
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fsr_bits_to_clear = FSR_TEND;
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fsr_bits_to_clear = FSR_TEND;
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break;
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break;
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}
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}
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}
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}
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- *SCFTDR = c;
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+ writeb(c, SCFTDR);
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if (fsr_bits_to_clear != 0)
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if (fsr_bits_to_clear != 0)
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- *SCFSR &= ~fsr_bits_to_clear;
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+ writew(readw(SCFSR) & ~fsr_bits_to_clear, SCFSR);
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}
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}
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void serial_putc(const char c)
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void serial_putc(const char c)
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@@ -196,22 +197,21 @@ int serial_tstc(void)
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#define RDRF_CLEAR 0x00fc
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#define RDRF_CLEAR 0x00fc
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void handle_error(void)
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void handle_error(void)
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{
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{
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-
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- (void)*SCFSR;
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- *SCFSR = FSR_ERR_CLEAR;
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- (void)*SCLSR;
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- *SCLSR = 0x00;
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+ readw(SCFSR);
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+ writew(FSR_ERR_CLEAR, SCFSR);
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+ readw(SCLSR);
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+ writew(0x00, SCLSR);
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}
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}
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int serial_getc_check(void)
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int serial_getc_check(void)
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{
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{
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unsigned short status;
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unsigned short status;
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- status = *SCFSR;
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+ status = readw(SCFSR);
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if (status & (FSR_FER | FSR_ER | FSR_BRK))
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if (status & (FSR_FER | FSR_ER | FSR_BRK))
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handle_error();
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handle_error();
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- if (*SCLSR & LSR_ORER)
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+ if (readw(SCLSR) & LSR_ORER)
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handle_error();
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handle_error();
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return status & (FSR_DR | FSR_RDF);
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return status & (FSR_DR | FSR_RDF);
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}
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}
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@@ -224,15 +224,15 @@ int serial_getc(void)
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while (!serial_getc_check())
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while (!serial_getc_check())
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;
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;
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- ch = *SCFRDR;
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- status = *SCFSR;
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+ ch = readb(SCFRDR);
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+ status = readw(SCFSR);
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- *SCFSR = RDRF_CLEAR;
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+ writew(RDRF_CLEAR, SCFSR);
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if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK))
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if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK))
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handle_error();
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handle_error();
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- if (*SCLSR & LSR_ORER)
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+ if (readw(SCLSR) & LSR_ORER)
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handle_error();
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handle_error();
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return ch;
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return ch;
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