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@@ -27,9 +27,6 @@
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/* Set this to 1 to clear the CMOS RAM */
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#define CLEAR_CMOS 0
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-static uchar rtc_read (uchar reg);
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-static void rtc_write (uchar reg, uchar val);
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-
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#define RTC_PORT_MC146818 CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70
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#define RTC_SECONDS 0x00
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#define RTC_SECONDS_ALARM 0x01
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@@ -60,24 +57,24 @@ int rtc_get (struct rtc_time *tmp)
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{
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uchar sec, min, hour, mday, wday, mon, year;
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/* here check if rtc can be accessed */
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- while((rtc_read(RTC_CONFIG_A)&0x80)==0x80);
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- sec = rtc_read (RTC_SECONDS);
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- min = rtc_read (RTC_MINUTES);
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- hour = rtc_read (RTC_HOURS);
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- mday = rtc_read (RTC_DATE_OF_MONTH);
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- wday = rtc_read (RTC_DAY_OF_WEEK);
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- mon = rtc_read (RTC_MONTH);
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- year = rtc_read (RTC_YEAR);
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+ while ((rtc_read8(RTC_CONFIG_A) & 0x80) == 0x80);
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+ sec = rtc_read8(RTC_SECONDS);
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+ min = rtc_read8(RTC_MINUTES);
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+ hour = rtc_read8(RTC_HOURS);
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+ mday = rtc_read8(RTC_DATE_OF_MONTH);
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+ wday = rtc_read8(RTC_DAY_OF_WEEK);
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+ mon = rtc_read8(RTC_MONTH);
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+ year = rtc_read8(RTC_YEAR);
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#ifdef RTC_DEBUG
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printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
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"hr: %02x min: %02x sec: %02x\n",
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year, mon, mday, wday,
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hour, min, sec );
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printf ( "Alarms: month: %02x hour: %02x min: %02x sec: %02x\n",
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- rtc_read (RTC_CONFIG_D) & 0x3F,
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- rtc_read (RTC_HOURS_ALARM),
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- rtc_read (RTC_MINUTES_ALARM),
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- rtc_read (RTC_SECONDS_ALARM) );
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+ rtc_read8(RTC_CONFIG_D) & 0x3F,
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+ rtc_read8(RTC_HOURS_ALARM),
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+ rtc_read8(RTC_MINUTES_ALARM),
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+ rtc_read8(RTC_SECONDS_ALARM));
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#endif
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tmp->tm_sec = bcd2bin (sec & 0x7F);
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tmp->tm_min = bcd2bin (min & 0x7F);
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@@ -108,80 +105,108 @@ int rtc_set (struct rtc_time *tmp)
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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#endif
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- rtc_write(RTC_CONFIG_B,0x82); /* disables the RTC to update the regs */
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+ rtc_write8(RTC_CONFIG_B, 0x82); /* disable the RTC to update the regs */
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- rtc_write (RTC_YEAR, bin2bcd(tmp->tm_year % 100));
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- rtc_write (RTC_MONTH, bin2bcd(tmp->tm_mon));
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- rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
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- rtc_write (RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday));
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- rtc_write (RTC_HOURS, bin2bcd(tmp->tm_hour));
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- rtc_write (RTC_MINUTES, bin2bcd(tmp->tm_min ));
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- rtc_write (RTC_SECONDS, bin2bcd(tmp->tm_sec ));
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- rtc_write(RTC_CONFIG_B,0x02); /* enables the RTC to update the regs */
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+ rtc_write8(RTC_YEAR, bin2bcd(tmp->tm_year % 100));
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+ rtc_write8(RTC_MONTH, bin2bcd(tmp->tm_mon));
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+ rtc_write8(RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
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+ rtc_write8(RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday));
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+ rtc_write8(RTC_HOURS, bin2bcd(tmp->tm_hour));
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+ rtc_write8(RTC_MINUTES, bin2bcd(tmp->tm_min));
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+ rtc_write8(RTC_SECONDS, bin2bcd(tmp->tm_sec));
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+ rtc_write8(RTC_CONFIG_B, 0x02); /* enable the RTC to update the regs */
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return 0;
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}
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void rtc_reset (void)
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{
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- rtc_write(RTC_CONFIG_B,0x82); /* disables the RTC to update the regs */
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- rtc_write(RTC_CONFIG_A,0x20); /* Normal OP */
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- rtc_write(RTC_CONFIG_B,0x00);
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- rtc_write(RTC_CONFIG_B,0x00);
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- rtc_write(RTC_CONFIG_B,0x02); /* enables the RTC to update the regs */
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+ rtc_write8(RTC_CONFIG_B, 0x82); /* disable the RTC to update the regs */
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+ rtc_write8(RTC_CONFIG_A, 0x20); /* Normal OP */
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+ rtc_write8(RTC_CONFIG_B, 0x00);
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+ rtc_write8(RTC_CONFIG_B, 0x00);
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+ rtc_write8(RTC_CONFIG_B, 0x02); /* enable the RTC to update the regs */
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}
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/* ------------------------------------------------------------------------- */
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-#ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
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/*
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* use direct memory access
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*/
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-static uchar rtc_read (uchar reg)
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+int rtc_read8(int reg)
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{
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+#ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
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return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg);
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+#else
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+ int ofs = 0;
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+
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+ if (reg >= 128) {
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+ ofs = 2;
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+ reg -= 128;
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+ }
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+ out8(RTC_PORT_MC146818 + ofs, reg);
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+
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+ return in8(RTC_PORT_MC146818 + ofs + 1);
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+#endif
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}
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-static void rtc_write (uchar reg, uchar val)
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+void rtc_write8(int reg, uchar val)
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{
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+#ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
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out8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg, val);
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-}
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#else
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-static uchar rtc_read (uchar reg)
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+ int ofs = 0;
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+
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+ if (reg >= 128) {
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+ ofs = 2;
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+ reg -= 128;
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+ }
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+ out8(RTC_PORT_MC146818 + ofs, reg);
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+ out8(RTC_PORT_MC146818 + ofs + 1, val);
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+#endif
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+}
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+
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+u32 rtc_read32(int reg)
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{
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- out8(RTC_PORT_MC146818,reg);
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- return in8(RTC_PORT_MC146818 + 1);
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+ u32 value = 0;
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+ int i;
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+
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+ for (i = 0; i < sizeof(value); i++)
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+ value |= rtc_read8(reg + i) << (i << 3);
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+
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+ return value;
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}
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-static void rtc_write (uchar reg, uchar val)
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+void rtc_write32(int reg, u32 value)
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{
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- out8(RTC_PORT_MC146818,reg);
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- out8(RTC_PORT_MC146818+1, val);
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+ int i;
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+
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+ for (i = 0; i < sizeof(value); i++)
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+ rtc_write8(reg + i, (value >> (i << 3)) & 0xff);
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}
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-#endif
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void rtc_init(void)
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{
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#if CLEAR_CMOS
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int i;
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- rtc_write(RTC_SECONDS_ALARM, 0);
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- rtc_write(RTC_MINUTES_ALARM, 0);
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- rtc_write(RTC_HOURS_ALARM, 0);
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+ rtc_write8(RTC_SECONDS_ALARM, 0);
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+ rtc_write8(RTC_MINUTES_ALARM, 0);
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+ rtc_write8(RTC_HOURS_ALARM, 0);
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for (i = RTC_CONFIG_A; i < RTC_REG_SIZE; i++)
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- rtc_write(i, 0);
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+ rtc_write8(i, 0);
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printf("RTC: zeroing CMOS RAM\n");
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#endif
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/* Setup the real time clock */
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- rtc_write(RTC_CONFIG_B, RTC_CONFIG_B_24H);
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+ rtc_write8(RTC_CONFIG_B, RTC_CONFIG_B_24H);
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/* Setup the frequency it operates at */
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- rtc_write(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ |
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+ rtc_write8(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ |
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RTC_CONFIG_A_RATE_1024HZ);
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/* Ensure all reserved bits are 0 in register D */
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- rtc_write(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME);
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+ rtc_write8(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME);
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/* Clear any pending interrupts */
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- rtc_read(RTC_CONFIG_C);
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+ rtc_read8(RTC_CONFIG_C);
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}
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#endif
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