omap: Update the base address of the MMC controllers

Align the base address defined in header files with the base address used
in the DTS. This will facilitate the introduction of the DMA support.

Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at
the top. This region will be used to determine if the controller supports
DMA transfers

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

arch/arm/include/asm/arch-am33xx/mmc_host_def.h

@@ -21,8 +21,8 @@
 /*
  * OMAP HSMMC register definitions
  */
-#define OMAP_HSMMC1_BASE		0x48060100
-#define OMAP_HSMMC2_BASE		0x481D8100
+#define OMAP_HSMMC1_BASE		0x48060000
+#define OMAP_HSMMC2_BASE		0x481D8000
 
 #if defined(CONFIG_TI814X)
 #undef MMC_CLOCK_REFERENCE

arch/arm/include/asm/arch-omap4/mmc_host_def.h

@@ -31,8 +31,8 @@
  * OMAP HSMMC register definitions
  */
 
-#define OMAP_HSMMC1_BASE	0x4809C100
-#define OMAP_HSMMC2_BASE	0x480B4100
-#define OMAP_HSMMC3_BASE	0x480AD100
+#define OMAP_HSMMC1_BASE	0x4809C000
+#define OMAP_HSMMC2_BASE	0x480B4000
+#define OMAP_HSMMC3_BASE	0x480AD000
 
 #endif /* MMC_HOST_DEF_H */

arch/arm/include/asm/arch-omap5/mmc_host_def.h

@@ -31,8 +31,8 @@
  * OMAP HSMMC register definitions
  */
 
-#define OMAP_HSMMC1_BASE	0x4809C100
-#define OMAP_HSMMC2_BASE	0x480B4100
-#define OMAP_HSMMC3_BASE	0x480AD100
+#define OMAP_HSMMC1_BASE	0x4809C000
+#define OMAP_HSMMC2_BASE	0x480B4000
+#define OMAP_HSMMC3_BASE	0x480AD000
 
 #endif /* MMC_HOST_DEF_H */

arch/arm/include/asm/omap_mmc.h

@@ -28,7 +28,7 @@
 #include <mmc.h>
 
 struct hsmmc {
-#ifdef CONFIG_DM_MMC
+#ifndef CONFIG_OMAP34XX
 	unsigned char res0[0x100];
 #endif
 	unsigned char res1[0x10];

arch/arm/mach-keystone/include/mach/mmc_host_def.h

@@ -16,7 +16,7 @@
  * OMAP HSMMC register definitions
  */
 
-#define OMAP_HSMMC1_BASE	0x23000100
-#define OMAP_HSMMC2_BASE	0x23100100
+#define OMAP_HSMMC1_BASE	0x23000000
+#define OMAP_HSMMC2_BASE	0x23100000
 
 #endif /* K2G_MMC_HOST_DEF_H */