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@@ -5,9 +5,6 @@
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#ifndef __CONFIG_SOCFPGA_COMMON_H__
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#ifndef __CONFIG_SOCFPGA_COMMON_H__
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#define __CONFIG_SOCFPGA_COMMON_H__
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#define __CONFIG_SOCFPGA_COMMON_H__
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-/* Virtual target or real hardware */
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-#undef CONFIG_SOCFPGA_VIRTUAL_TARGET
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-
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/*
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/*
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* High level configuration
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* High level configuration
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*/
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*/
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@@ -76,7 +73,7 @@
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/*
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/*
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* Ethernet on SoC (EMAC)
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* Ethernet on SoC (EMAC)
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*/
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*/
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-#if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
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+#ifdef CONFIG_CMD_NET
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#define CONFIG_DW_ALTDESCRIPTOR
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#define CONFIG_DW_ALTDESCRIPTOR
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#define CONFIG_MII
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#define CONFIG_MII
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#endif
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#endif
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@@ -95,11 +92,7 @@
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#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
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#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
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#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
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-#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
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-#define CONFIG_SYS_TIMER_RATE 2400000
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-#else
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#define CONFIG_SYS_TIMER_RATE 25000000
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#define CONFIG_SYS_TIMER_RATE 25000000
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-#endif
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/*
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/*
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* L4 Watchdog
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* L4 Watchdog
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@@ -181,9 +174,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
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*/
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*/
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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-#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
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-#define CONFIG_SYS_NS16550_CLK 1000000
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-#elif defined(CONFIG_TARGET_SOCFPGA_GEN5)
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+#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
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#define CONFIG_SYS_NS16550_COM1 SOCFPGA_UART0_ADDRESS
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#define CONFIG_SYS_NS16550_COM1 SOCFPGA_UART0_ADDRESS
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#define CONFIG_SYS_NS16550_CLK 100000000
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#define CONFIG_SYS_NS16550_CLK 100000000
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#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
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#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
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