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@@ -17,9 +17,6 @@
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*/
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#include "../../../board/altera/socfpga/qts/sdram_config.h"
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-/* define constant for 4G memory - used for SDRAM errata workaround */
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-#define MEMSIZE_4G (4ULL * 1024ULL * 1024ULL * 1024ULL)
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-
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DECLARE_GLOBAL_DATA_PTR;
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struct sdram_prot_rule {
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@@ -40,12 +37,26 @@ static struct socfpga_system_manager *sysmgr_regs =
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static struct socfpga_sdr_ctrl *sdr_ctrl =
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(struct socfpga_sdr_ctrl *)SDR_CTRLGRP_ADDRESS;
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-static int compute_errata_rows(unsigned long long memsize, int cs, int width,
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- int rows, int banks, int cols)
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+/**
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+ * get_errata_rows() - Up the number of DRAM rows to cover entire address space
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+ *
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+ * SDRAM Failure happens when accessing non-existent memory. Artificially
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+ * increase the number of rows so that the memory controller thinks it has
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+ * 4GB of RAM. This function returns such amount of rows.
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+ */
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+static int get_errata_rows(void)
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{
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+ /* Define constant for 4G memory - used for SDRAM errata workaround */
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+#define MEMSIZE_4G (4ULL * 1024ULL * 1024ULL * 1024ULL)
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+ const unsigned long long memsize = MEMSIZE_4G;
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+ const unsigned int cs = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS;
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+ const unsigned int rows = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS;
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+ const unsigned int banks = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS;
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+ const unsigned int cols = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS;
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+ const unsigned int width = 8;
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+
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unsigned long long newrows;
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- int inewrowslog2;
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- int bits;
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+ int bits, inewrowslog2;
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debug("workaround rows - memsize %lld\n", memsize);
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debug("workaround rows - cs %d\n", cs);
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@@ -410,12 +421,7 @@ static void set_sdr_dram_lowpwr_timing(void)
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static void set_sdr_addr_rw(void)
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{
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- int cs = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS;
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- int width = 8;
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- int rows = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS;
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- int banks = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS;
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- int cols = CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS;
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- unsigned long long workaround_memsize = MEMSIZE_4G;
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+ int rows;
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debug("Configuring DRAMADDRW\n");
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clrsetbits_le32(&sdr_ctrl->dram_addrw, SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK,
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@@ -426,8 +432,7 @@ static void set_sdr_addr_rw(void)
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* Update Preloader to artificially increase the number of rows so
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* that the memory thinks it has 4GB of RAM.
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*/
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- rows = compute_errata_rows(workaround_memsize, cs, width, rows, banks,
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- cols);
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+ rows = get_errata_rows();
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clrsetbits_le32(&sdr_ctrl->dram_addrw, SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK,
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rows << SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB);
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