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@@ -0,0 +1,33 @@
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+/*
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+ * (C) Copyright 2016 Linaro
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+ * Jon Medhurst <tixy@linaro.org>
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+ *
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+ * TC2 specific code for Versatile Express.
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+
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+#include <asm/io.h>
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+
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+#define SCC_BASE 0x7fff0000
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+
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+bool armv7_boot_nonsec_default(void)
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+{
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+#ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
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+ return false
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+#else
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+ /*
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+ * The Serial Configuration Controller (SCC) register at address 0x700
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+ * contains flags for configuring the behaviour of the Boot Monitor
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+ * (which CPUs execute from reset). Two of these bits are of interest:
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+ *
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+ * bit 12 = Use per-cpu mailboxes for power management
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+ * bit 13 = Power down the non-boot cluster
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+ *
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+ * It is only when both of these are false that U-Boot's current
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+ * implementation of 'nonsec' mode can work as expected because we
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+ * rely on getting all CPUs to execute _nonsec_init, so let's check that.
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+ */
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+ return (readl((u32 *)(SCC_BASE + 0x700)) & ((1 << 12) | (1 << 13))) == 0;
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+#endif
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+}
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