mips: bmips: add bcm6345-rst driver support for BCM6358

This driver can control up to 32 resets.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

arch/mips/dts/brcm,bcm6358.dtsi

@@ -6,6 +6,7 @@
 
 #include <dt-bindings/clock/bcm6358-clock.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/reset/bcm6358-reset.h>
 #include "skeleton.dtsi"
 
 / {
@@ -80,6 +81,12 @@
 			mask = <0x1>;
 		};
 
+		periph_rst: reset-controller@fffe0034 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0xfffe0034 0x4>;
+			#reset-cells = <1>;
+		};
+
 		gpio1: gpio-controller@fffe0080 {
 			compatible = "brcm,bcm6345-gpio";
 			reg = <0xfffe0080 0x4>, <0xfffe0088 0x4>;

include/dt-bindings/reset/bcm6358-reset.h

@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6358_H
+#define __DT_BINDINGS_RESET_BCM6358_H
+
+#define BCM6358_RST_SPI		0
+#define BCM6358_RST_ENET	2
+#define BCM6358_RST_MPI		3
+#define BCM6358_RST_EPHY	6
+#define BCM6358_RST_SAR		7
+#define BCM6358_RST_USBH	12
+#define BCM6358_RST_PCM		13
+#define BCM6358_RST_ADSL	14
+
+#endif /* __DT_BINDINGS_RESET_BCM6358_H */