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@@ -2905,6 +2905,8 @@ struct ccsr_sfp_regs {
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#endif
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#define CONFIG_SYS_FSL_CORENET_SERDES_OFFSET 0xEA000
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#define CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET 0xEB000
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+#define CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET 0xEC000
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+#define CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET 0xED000
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#define CONFIG_SYS_FSL_CPC_OFFSET 0x10000
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#define CONFIG_SYS_FSL_SCFG_OFFSET 0xFC000
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#define CONFIG_SYS_MPC85xx_DMA1_OFFSET 0x100000
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@@ -3090,6 +3092,10 @@ struct ccsr_sfp_regs {
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(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
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#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET)
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+#define CONFIG_SYS_FSL_CORENET_SERDES3_ADDR \
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+ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET)
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+#define CONFIG_SYS_FSL_CORENET_SERDES4_ADDR \
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+ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET)
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#define CONFIG_SYS_MPC85xx_USB1_ADDR \
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(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_OFFSET)
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#define CONFIG_SYS_MPC85xx_USB2_ADDR \
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