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@@ -13,7 +13,7 @@ static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
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{
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{
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}
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}
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-int zynq_sdhci_init(unsigned long regbase);
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+int zynq_sdhci_init(phys_addr_t regbase);
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int zynq_slcr_get_mio_pin_status(const char *periph);
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int zynq_slcr_get_mio_pin_status(const char *periph);
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unsigned int zynqmp_get_silicon_version(void);
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unsigned int zynqmp_get_silicon_version(void);
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