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@@ -0,0 +1,45 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * K3: ARM64 MMU setup
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+ *
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+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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+ * Lokesh Vutla <lokeshvutla@ti.com>
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+ * (This file is derived from arch/arm/cpu/armv8/zynqmp/cpu.c)
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+ *
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+ */
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+
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+#include <common.h>
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+#include <asm/system.h>
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+#include <asm/armv8/mmu.h>
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+
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+/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
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+#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3)
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+
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+/* ToDo: Add 64bit IO */
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+struct mm_region am654_mem_map[NR_MMU_REGIONS] = {
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+ {
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+ .virt = 0x0UL,
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+ .phys = 0x0UL,
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+ .size = 0x80000000UL,
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+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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+ PTE_BLOCK_NON_SHARE |
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+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
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+ }, {
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+ .virt = 0x80000000UL,
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+ .phys = 0x80000000UL,
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+ .size = 0x80000000UL,
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+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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+ PTE_BLOCK_INNER_SHARE
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+ }, {
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+ .virt = 0x880000000UL,
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+ .phys = 0x880000000UL,
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+ .size = 0x80000000UL,
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+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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+ PTE_BLOCK_INNER_SHARE
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+ }, {
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+ /* List terminator */
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+ 0,
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+ }
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+};
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+
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+struct mm_region *mem_map = am654_mem_map;
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