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@@ -182,6 +182,7 @@ struct zynq_gem_priv {
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int phy_of_handle;
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struct mii_dev *bus;
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struct clk clk;
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+ bool int_pcs;
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};
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static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
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@@ -425,7 +426,12 @@ static int zynq_gem_init(struct udevice *dev)
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nwconfig = ZYNQ_GEM_NWCFG_INIT;
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- if (priv->interface == PHY_INTERFACE_MODE_SGMII) {
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+ /*
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+ * Set SGMII enable PCS selection only if internal PCS/PMA
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+ * core is used and interface is SGMII.
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+ */
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+ if (priv->interface == PHY_INTERFACE_MODE_SGMII &&
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+ priv->int_pcs) {
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nwconfig |= ZYNQ_GEM_NWCFG_SGMII_ENBL |
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ZYNQ_GEM_NWCFG_PCS_SEL;
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#ifdef CONFIG_ARM64
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@@ -697,6 +703,9 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev)
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}
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priv->interface = pdata->phy_interface;
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+ priv->int_pcs = fdtdec_get_bool(gd->fdt_blob, node,
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+ "is-internal-pcspma");
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+
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printf("ZYNQ GEM: %lx, phyaddr %x, interface %s\n", (ulong)priv->iobase,
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priv->phyaddr, phy_string_for_interface(priv->interface));
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