Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips

- tree-wide: introduce LDFLAGS_STANDALONE
- MIPS: fix long-standing issue with linking of standalone programs
- MIPS: MT76xx: add GPIO and WDT drivers
- MIPS: MT76xx: various fixes and updates to gardena-smart-gateway board
- MIPS: MT76xx: various fixes and updates to linkit-smart-7688 board

arch/mips/Kconfig

@@ -74,9 +74,12 @@ config ARCH_MT7620
 	imply CMD_DM
 	select DISPLAY_CPUINFO
 	select DM
+	imply DM_ETH
+	imply DM_GPIO
 	select DM_SERIAL
 	imply DM_SPI
 	imply DM_SPI_FLASH
+	select ARCH_MISC_INIT if WATCHDOG
 	select MIPS_TUNE_24KC
 	select OF_CONTROL
 	select ROM_EXCEPTION_VECTORS

arch/mips/config.mk

@@ -25,12 +25,14 @@ ifdef CONFIG_32BIT
 PLATFORM_CPPFLAGS	+= -mabi=32
 PLATFORM_LDFLAGS	+= -m $(32bit-emul)
 OBJCOPYFLAGS		+= -O $(32bit-bfd)
+CONFIG_STANDALONE_LOAD_ADDR	?= 0x80200000
 endif
 
 ifdef CONFIG_64BIT
 PLATFORM_CPPFLAGS	+= -mabi=64
 PLATFORM_LDFLAGS	+= -m$(64bit-emul)
 OBJCOPYFLAGS		+= -O $(64bit-bfd)
+CONFIG_STANDALONE_LOAD_ADDR	?= 0xffffffff80200000
 endif
 
 PLATFORM_CPPFLAGS += -D__MIPS__
@@ -65,3 +67,5 @@ PLATFORM_LDFLAGS		+= -G 0 -static -n -nostdlib
 PLATFORM_RELFLAGS		+= -ffunction-sections -fdata-sections
 LDFLAGS_FINAL			+= --gc-sections
 OBJCOPYFLAGS			+= -j .text -j .rodata -j .data -j .u_boot_list
+
+LDFLAGS_STANDALONE		+= --gc-sections

arch/mips/cpu/mips32/config.mk

@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
-
-CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 \
-			       -T $(srctree)/examples/standalone/mips.lds

arch/mips/cpu/mips64/config.mk

@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2003
-# Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
-
-CONFIG_STANDALONE_LOAD_ADDR ?= 0xffffffff80200000 \
-			       -T $(srctree)/examples/standalone/mips64.lds

arch/mips/dts/gardena-smart-gateway-mt7688.dts

@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "mt7628a.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	compatible = "gardena,smart-gateway-mt7688", "ralink,mt7628a-soc";
@@ -21,8 +22,65 @@
 		reg = <0x0 0x08000000>;
 	};
 
+	leds {
+		compatible = "gpio-leds";
+
+		power_blue {
+			label = "smartgw:power:blue";
+			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		power_green {
+			label = "smartgw:power:green";
+			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		power_red {
+			label = "smartgw:power:red";
+			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		radio_blue {
+			label = "smartgw:radio:blue";
+			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		radio_green {
+			label = "smartgw:radio:green";
+			gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		radio_red {
+			label = "smartgw:radio:red";
+			gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		internet_blue {
+			label = "smartgw:internet:blue";
+			gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		internet_green {
+			label = "smartgw:internet:green";
+			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		internet_red {
+			label = "smartgw:internet:red";
+			gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+	};
+
 	chosen {
-		bootargs = "console=ttyS0,57600";
 		stdout-path = &uart0;
 	};
 };

arch/mips/dts/linkit-smart-7688.dts

@@ -22,7 +22,6 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,57600";
 		stdout-path = &uart2;
 	};
 };

arch/mips/dts/mt7628a.dtsi

@@ -48,6 +48,17 @@
 			mask = <0x1>;
 		};
 
+		watchdog: watchdog@100 {
+			compatible = "ralink,mt7628a-wdt", "mediatek,mt7621-wdt";
+			reg = <0x100 0x30>;
+
+			resets = <&resetc 8>;
+			reset-names = "wdt";
+
+			interrupt-parent = <&intc>;
+			interrupts = <24>;
+		};
+
 		intc: interrupt-controller@200 {
 			compatible = "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
@@ -71,6 +82,38 @@
 			reg = <0x300 0x100>;
 		};
 
+		gpio@600 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
+			reg = <0x600 0x100>;
+
+			interrupt-parent = <&intc>;
+			interrupts = <6>;
+
+			gpio0: bank@0 {
+				reg = <0>;
+				compatible = "mtk,mt7621-gpio-bank";
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+			gpio1: bank@1 {
+				reg = <1>;
+				compatible = "mtk,mt7621-gpio-bank";
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+			gpio2: bank@2 {
+				reg = <2>;
+				compatible = "mtk,mt7621-gpio-bank";
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+		};
+
 		spi0: spi@b00 {
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x40>;
@@ -120,6 +163,14 @@
 		};
 	};
 
+	eth@10110000 {
+		compatible = "mediatek,mt7622-eth";
+		reg = <0x10100000 0x10000
+		       0x10110000 0x8000>;
+
+		syscon = <&sysc>;
+	};
+
 	usb_phy: usb-phy@10120000 {
 		compatible = "mediatek,mt7628-usbphy";
 		reg = <0x10120000 0x1000>;

arch/mips/include/asm/u-boot-mips.h

@@ -7,4 +7,6 @@ void exc_handler(void);
 void except_vec3_generic(void);
 void except_vec_ejtag_debug(void);
 
+int arch_misc_init(void);
+
 #endif /* _U_BOOT_MIPS_H_ */

arch/mips/mach-mt7620/Kconfig

@@ -24,6 +24,7 @@ choice
 config BOARD_GARDENA_SMART_GATEWAY_MT7688
 	bool "Gardena Smart Gateway"
 	depends on SOC_MT7620
+	select BOARD_LATE_INIT
 	select SUPPORTS_BOOT_RAM
 	help
 	  Gardena Smart Gateway boards have a MT7688 SoC with 128 MiB of RAM

arch/mips/mach-mt7620/cpu.c

@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <ram.h>
+#include <wdt.h>
 #include <asm/io.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
@@ -67,3 +68,42 @@ int print_cpuinfo(void)
 
 	return 0;
 }
+
+#ifdef CONFIG_WATCHDOG
+static struct udevice *watchdog_dev;
+
+/* Called by macro WATCHDOG_RESET */
+void watchdog_reset(void)
+{
+	static ulong next_reset;
+	ulong now;
+
+	if (!watchdog_dev)
+		return;
+
+	now = get_timer(0);
+
+	/* Do not reset the watchdog too often */
+	if (now > next_reset) {
+		next_reset = now + 1000;	/* reset every 1000ms */
+		wdt_reset(watchdog_dev);
+	}
+}
+
+int arch_misc_init(void)
+{
+	/* Init watchdog */
+	if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
+		debug("Watchdog: Not found by seq!\n");
+		if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
+			puts("Watchdog: Not found!\n");
+			return 0;
+		}
+	}
+
+	wdt_start(watchdog_dev, 60000, 0);	/* 60 seconds */
+	printf("Watchdog: Started\n");
+
+	return 0;
+}
+#endif

arch/mips/mach-mt7620/lowlevel_init.S

@@ -108,6 +108,12 @@ CPLL_READY:
 	sw	t3, 0(t0)
 
 CPLL_DONE:
+	/* Reset MC */
+	lw	t2, 0x34(s0)
+	ori	t2, BIT(10)
+	sw	t2, 0x34(s0)
+	nop
+
 	/*
 	 * SDR and DDR initialization: delay 200us
 	 */

arch/nds32/config.mk

@@ -12,8 +12,8 @@ ifeq ($(CROSS_COMPILE),)
 CROSS_COMPILE := nds32le-linux-
 endif
 
-CONFIG_STANDALONE_LOAD_ADDR = 0x300000 \
-			      -T $(srctree)/examples/standalone/nds32.lds
+CONFIG_STANDALONE_LOAD_ADDR = 0x300000
+LDFLAGS_STANDALONE	+= -T $(srctree)/examples/standalone/nds32.lds
 
 PLATFORM_RELFLAGS	+= -fno-common -mrelax
 PLATFORM_RELFLAGS	+= -gdwarf-2

arch/riscv/config.mk

@@ -27,8 +27,8 @@ CFLAGS_EFI		+= -march=rv64ima -mabi=lp64
 EFI_LDS			:= elf_riscv64_efi.lds
 endif
 
-CONFIG_STANDALONE_LOAD_ADDR = 0x00000000 \
-			      -T $(srctree)/examples/standalone/riscv.lds
+CONFIG_STANDALONE_LOAD_ADDR = 0x00000000
+LDFLAGS_STANDALONE += -T $(srctree)/examples/standalone/riscv.lds
 
 PLATFORM_CPPFLAGS	+= -ffixed-gp -fpic
 PLATFORM_RELFLAGS	+= -fno-common -gdwarf-2 -ffunction-sections

arch/sh/config.mk

@@ -9,7 +9,7 @@ endif
 
 CONFIG_STANDALONE_LOAD_ADDR ?= 0x8C000000
 ifeq ($(CPU),sh2)
-CONFIG_STANDALONE_LOAD_ADDR += -EB
+LDFLAGS_STANDALONE += -EB
 endif
 
 PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__

board/gardena/smart-gateway-mt7688/board.c

@@ -4,14 +4,26 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
+#include <led.h>
+#include <linux/io.h>
+
+#define MT76XX_AGPIO_CFG	0x1000003c
 
 int board_early_init_f(void)
 {
-	/*
-	 * Nothing to be done here for this board (no UART setup etc)
-	 * right now. We might need some pin muxing, so lets keep this
-	 * function for now.
-	 */
+	void __iomem *gpio_mode;
+
+	/* Configure digital vs analog GPIOs */
+	gpio_mode = ioremap_nocache(MT76XX_AGPIO_CFG, 0x100);
+	iowrite32(0x00fe01ff, gpio_mode);
+
+	return 0;
+}
+
+int board_late_init(void)
+{
+	if (IS_ENABLED(CONFIG_LED))
+		led_default_state();
+
 	return 0;
 }

board/seeed/linkit-smart-7688/board.c

@@ -6,12 +6,15 @@
 #include <common.h>
 #include <asm/io.h>
 
-#define MT76XX_GPIO1_MODE	0xb0000060
+#define MT76XX_GPIO1_MODE	0x10000060
 
 void board_debug_uart_init(void)
 {
+	void __iomem *gpio_mode;
+
 	/* Select UART2 mode instead of GPIO mode (default) */
-	clrbits_le32((void __iomem *)MT76XX_GPIO1_MODE, GENMASK(27, 26));
+	gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
+	clrbits_le32(gpio_mode, GENMASK(27, 26));
 }
 
 int board_early_init_f(void)

config.mk

@@ -15,6 +15,7 @@ PLATFORM_CPPFLAGS :=
 PLATFORM_LDFLAGS :=
 LDFLAGS :=
 LDFLAGS_FINAL :=
+LDFLAGS_STANDALONE :=
 OBJCOPYFLAGS :=
 # clear VENDOR for tcsh
 VENDOR :=
@@ -75,4 +76,5 @@ LDFLAGS_FINAL += -Bstatic
 export PLATFORM_CPPFLAGS
 export RELFLAGS
 export LDFLAGS_FINAL
+export LDFLAGS_STANDALONE
 export CONFIG_STANDALONE_LOAD_ADDR

configs/gardena-smart-gateway-mt7688-ram_defconfig

@@ -1,56 +1,76 @@
 CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x80010000
 CONFIG_ARCH_MT7620=y
-# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
 CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MTD=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_BOOTCOUNT=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_UUID=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDIDS_DEFAULT="spi-nand0=spi-nand0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:-(ubi)"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:-(nand)"
 CONFIG_CMD_UBI=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
 CONFIG_CLK=y
-CONFIG_CPU=y
-CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
 CONFIG_MTD=y
+CONFIG_MTD_SPI_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_MTD_UBI_BEB_LIMIT=22
+CONFIG_PHYLIB=y
+CONFIG_PHY_FIXED=y
+CONFIG_MT7628_ETH=y
 CONFIG_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=57600
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
 CONFIG_SYSRESET_SYSCON=y
+CONFIG_WATCHDOG=y
+CONFIG_WDT=y
+CONFIG_WDT_MT7621=y
+CONFIG_LZMA=y

configs/gardena-smart-gateway-mt7688_defconfig

@@ -4,56 +4,76 @@ CONFIG_ARCH_MT7620=y
 CONFIG_BOOT_ROM=y
 CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y
 CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y
-# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
 CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MTD=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_BOOTCOUNT=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_UUID=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDIDS_DEFAULT="spi-nand0=spi-nand0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:-(ubi)"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:-(nand)"
 CONFIG_CMD_UBI=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
 CONFIG_CLK=y
-CONFIG_CPU=y
-CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
 CONFIG_MTD=y
+CONFIG_MTD_SPI_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_MTD_UBI_BEB_LIMIT=22
+CONFIG_PHYLIB=y
+CONFIG_PHY_FIXED=y
+CONFIG_MT7628_ETH=y
 CONFIG_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=57600
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
 CONFIG_SYSRESET_SYSCON=y
+CONFIG_WATCHDOG=y
+CONFIG_WDT=y
+CONFIG_WDT_MT7621=y
+CONFIG_LZMA=y

configs/linkit-smart-7688-ram_defconfig

@@ -1,35 +1,38 @@
 CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x80010000
 CONFIG_ARCH_MT7620=y
-# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+CONFIG_BOARD_LINKIT_SMART_7688=y
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
 CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TIME=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_HAVE_BLOCK_DEVICE=y
 CONFIG_CLK=y
-CONFIG_CPU=y
-CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
@@ -40,12 +43,17 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_FIXED=y
+CONFIG_MT7628_ETH=y
 CONFIG_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=57600
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
 CONFIG_SYSRESET_SYSCON=y
+CONFIG_LZMA=y
+CONFIG_LZO=y

configs/linkit-smart-7688_defconfig

@@ -1,39 +1,42 @@
 CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x9c000000
 CONFIG_ARCH_MT7620=y
+CONFIG_BOARD_LINKIT_SMART_7688=y
 CONFIG_BOOT_ROM=y
 CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y
 CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y
-# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
 CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_CRC32 is not set
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TIME=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_HAVE_BLOCK_DEVICE=y
 CONFIG_CLK=y
-CONFIG_CPU=y
-CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
@@ -44,12 +47,17 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_FIXED=y
+CONFIG_MT7628_ETH=y
 CONFIG_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=57600
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
 CONFIG_SYSRESET_SYSCON=y
+CONFIG_LZMA=y
+CONFIG_LZO=y

drivers/gpio/Kconfig

@@ -314,4 +314,12 @@ config MPC8XXX_GPIO
 	  Aside from the standard functions of input/output mode, and output
 	  value setting, the open-drain feature, which can configure individual
 	  GPIOs to work as open-drain outputs, is supported.
+
+config MT7621_GPIO
+	bool "MediaTek MT7621 GPIO driver"
+	depends on DM_GPIO && ARCH_MT7620
+	default y
+	help
+	  Say yes here to support MediaTek MT7621 compatible GPIOs.
+
 endmenu

drivers/gpio/Makefile

@@ -58,3 +58,4 @@ obj-$(CONFIG_MVEBU_GPIO)	+= mvebu_gpio.o
 obj-$(CONFIG_MSM_GPIO)		+= msm_gpio.o
 obj-$(CONFIG_$(SPL_)PCF8575_GPIO)	+= pcf8575_gpio.o
 obj-$(CONFIG_PM8916_GPIO)	+= pm8916_gpio.o
+obj-$(CONFIG_MT7621_GPIO)	+= mt7621_gpio.o

drivers/gpio/mt7621_gpio.c

@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Stefan Roese <sr@denx.de>
+ *
+ * Based on the Linux driver version which is:
+ *   Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
+ *   Copyright (C) 2013 John Crispin <blogic@openwrt.org>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <malloc.h>
+#include <linux/io.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <dm/device-internal.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#define MTK_MAX_BANK		3
+#define MTK_BANK_WIDTH		32
+
+enum mediatek_gpio_reg {
+	GPIO_REG_CTRL = 0,
+	GPIO_REG_POL,
+	GPIO_REG_DATA,
+	GPIO_REG_DSET,
+	GPIO_REG_DCLR,
+	GPIO_REG_REDGE,
+	GPIO_REG_FEDGE,
+	GPIO_REG_HLVL,
+	GPIO_REG_LLVL,
+	GPIO_REG_STAT,
+	GPIO_REG_EDGE,
+};
+
+static void __iomem *mediatek_gpio_membase;
+
+struct mediatek_gpio_platdata {
+	char bank_name[3];	/* Name of bank, e.g. "PA", "PB" etc */
+	int gpio_count;
+	int bank;
+};
+
+static u32 reg_offs(struct mediatek_gpio_platdata *plat, int reg)
+{
+	return (reg * 0x10) + (plat->bank * 0x4);
+}
+
+static int mediatek_gpio_get_value(struct udevice *dev, unsigned int offset)
+{
+	struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+
+	return !!(ioread32(mediatek_gpio_membase +
+			   reg_offs(plat, GPIO_REG_DATA)) & BIT(offset));
+}
+
+static int mediatek_gpio_set_value(struct udevice *dev, unsigned int offset,
+				   int value)
+{
+	struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+
+	iowrite32(BIT(offset), mediatek_gpio_membase +
+		  reg_offs(plat, value ? GPIO_REG_DSET : GPIO_REG_DCLR));
+
+	return 0;
+}
+
+static int mediatek_gpio_direction_input(struct udevice *dev, unsigned int offset)
+{
+	struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+
+	clrbits_le32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL),
+		     BIT(offset));
+
+	return 0;
+}
+
+static int mediatek_gpio_direction_output(struct udevice *dev, unsigned int offset,
+					  int value)
+{
+	struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+
+	setbits_le32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL),
+		     BIT(offset));
+	mediatek_gpio_set_value(dev, offset, value);
+
+	return 0;
+}
+
+static int mediatek_gpio_get_function(struct udevice *dev, unsigned int offset)
+{
+	struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+	u32 t;
+
+	t = ioread32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL));
+	if (t & BIT(offset))
+		return GPIOF_OUTPUT;
+
+	return GPIOF_INPUT;
+}
+
+static const struct dm_gpio_ops gpio_mediatek_ops = {
+	.direction_input	= mediatek_gpio_direction_input,
+	.direction_output	= mediatek_gpio_direction_output,
+	.get_value		= mediatek_gpio_get_value,
+	.set_value		= mediatek_gpio_set_value,
+	.get_function		= mediatek_gpio_get_function,
+};
+
+static int gpio_mediatek_probe(struct udevice *dev)
+{
+	struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
+	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+	/* Tell the uclass how many GPIOs we have */
+	if (plat) {
+		uc_priv->gpio_count = plat->gpio_count;
+		uc_priv->bank_name = plat->bank_name;
+	}
+
+	return 0;
+}
+
+/**
+ * We have a top-level GPIO device with no actual GPIOs. It has a child
+ * device for each Mediatek bank.
+ */
+static int gpio_mediatek_bind(struct udevice *parent)
+{
+	struct mediatek_gpio_platdata *plat = parent->platdata;
+	ofnode node;
+	int bank = 0;
+	int ret;
+
+	/* If this is a child device, there is nothing to do here */
+	if (plat)
+		return 0;
+
+	mediatek_gpio_membase = dev_remap_addr(parent);
+	if (!mediatek_gpio_membase)
+		return -EINVAL;
+
+	for (node = dev_read_first_subnode(parent); ofnode_valid(node);
+	     node = dev_read_next_subnode(node)) {
+		struct mediatek_gpio_platdata *plat;
+		struct udevice *dev;
+
+		plat = calloc(1, sizeof(*plat));
+		if (!plat)
+			return -ENOMEM;
+		plat->bank_name[0] = 'P';
+		plat->bank_name[1] = 'A' + bank;
+		plat->bank_name[2] = '\0';
+		plat->gpio_count = MTK_BANK_WIDTH;
+		plat->bank = bank;
+
+		ret = device_bind(parent, parent->driver,
+				  plat->bank_name, plat, -1, &dev);
+		if (ret)
+			return ret;
+
+		dev->node = node;
+		bank++;
+	}
+
+	return 0;
+}
+
+static const struct udevice_id mediatek_gpio_ids[] = {
+	{ .compatible = "mtk,mt7621-gpio" },
+	{ }
+};
+
+U_BOOT_DRIVER(gpio_mediatek) = {
+	.name	= "gpio_mediatek",
+	.id	= UCLASS_GPIO,
+	.ops	= &gpio_mediatek_ops,
+	.of_match = mediatek_gpio_ids,
+	.bind	= gpio_mediatek_bind,
+	.probe	= gpio_mediatek_probe,
+};

drivers/watchdog/Kconfig

@@ -128,4 +128,12 @@ config WDT_AT91
 config AT91_HW_WDT_TIMEOUT
 	bool "AT91 watchdog timeout specified"
 	depends on WDT_AT91
+
+config WDT_MT7621
+	bool "MediaTek MT7621 watchdog timer support"
+	depends on WDT && ARCH_MT7620
+	help
+	   Select this to enable Ralink / Mediatek watchdog timer,
+	   which can be found on some MediaTek chips.
+
 endmenu

drivers/watchdog/Makefile

@@ -23,3 +23,4 @@ obj-$(CONFIG_BCM2835_WDT)       += bcm2835_wdt.o
 obj-$(CONFIG_WDT_ORION) += orion_wdt.o
 obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
 obj-$(CONFIG_MPC8xx_WATCHDOG) += mpc8xx_wdt.o
+obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o

drivers/watchdog/mt7621_wdt.c

@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Ralink / Mediatek RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
+ *
+ * Copyright (C) 2018 Stefan Roese <sr@denx.de>
+ *
+ * Based on the Linux driver version which is:
+ *   Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *   Copyright (C) 2013 John Crispin <blogic@openwrt.org>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <wdt.h>
+#include <linux/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct mt762x_wdt {
+	void __iomem *regs;
+};
+
+#define TIMER_REG_TMRSTAT		0x00
+#define TIMER_REG_TMR1CTL		0x20
+#define TIMER_REG_TMR1LOAD		0x24
+
+#define TMR1CTL_ENABLE			BIT(7)
+#define TMR1CTL_RESTART			BIT(9)
+#define TMR1CTL_PRESCALE_SHIFT		16
+
+static int mt762x_wdt_ping(struct mt762x_wdt *priv)
+{
+	writel(TMR1CTL_RESTART, priv->regs + TIMER_REG_TMRSTAT);
+
+	return 0;
+}
+
+static int mt762x_wdt_start(struct udevice *dev, u64 ms, ulong flags)
+{
+	struct mt762x_wdt *priv = dev_get_priv(dev);
+
+	/* set the prescaler to 1ms == 1000us */
+	writel(1000 << TMR1CTL_PRESCALE_SHIFT, priv->regs + TIMER_REG_TMR1CTL);
+	writel(ms, priv->regs + TIMER_REG_TMR1LOAD);
+
+	setbits_le32(priv->regs + TIMER_REG_TMR1CTL, TMR1CTL_ENABLE);
+
+	return 0;
+}
+
+static int mt762x_wdt_stop(struct udevice *dev)
+{
+	struct mt762x_wdt *priv = dev_get_priv(dev);
+
+	mt762x_wdt_ping(priv);
+
+	clrbits_le32(priv->regs + TIMER_REG_TMR1CTL, TMR1CTL_ENABLE);
+
+	return 0;
+}
+
+static int mt762x_wdt_reset(struct udevice *dev)
+{
+	struct mt762x_wdt *priv = dev_get_priv(dev);
+
+	mt762x_wdt_ping(priv);
+
+	return 0;
+}
+
+static int mt762x_wdt_probe(struct udevice *dev)
+{
+	struct mt762x_wdt *priv = dev_get_priv(dev);
+
+	priv->regs = dev_remap_addr(dev);
+	if (!priv->regs)
+		return -EINVAL;
+
+	mt762x_wdt_stop(dev);
+
+	return 0;
+}
+
+static const struct wdt_ops mt762x_wdt_ops = {
+	.start = mt762x_wdt_start,
+	.reset = mt762x_wdt_reset,
+	.stop = mt762x_wdt_stop,
+};
+
+static const struct udevice_id mt762x_wdt_ids[] = {
+	{ .compatible = "mediatek,mt7621-wdt" },
+	{}
+};
+
+U_BOOT_DRIVER(mt762x_wdt) = {
+	.name = "mt762x_wdt",
+	.id = UCLASS_WDT,
+	.of_match = mt762x_wdt_ids,
+	.probe = mt762x_wdt_probe,
+	.priv_auto_alloc_size = sizeof(struct mt762x_wdt),
+	.ops = &mt762x_wdt_ops,
+};

examples/standalone/Makefile

@@ -45,6 +45,8 @@ endif
 # source file.
 ccflags-y += $(call cc-option,-fno-toplevel-reorder)
 
+LDFLAGS_STANDALONE	+= -Ttext $(CONFIG_STANDALONE_LOAD_ADDR)
+
 #########################################################################
 
 quiet_cmd_link_lib = LD      $@
@@ -54,17 +56,17 @@ $(LIB):	$(LIBOBJS) FORCE
 	$(call if_changed,link_lib)
 
 quiet_cmd_link_elf = LD      $@
-      cmd_link_elf = $(LD) $(LDFLAGS) -g -Ttext $(CONFIG_STANDALONE_LOAD_ADDR) \
+      cmd_link_elf = $(LD) $(LDFLAGS) $(LDFLAGS_STANDALONE) -g  \
 		     -o $@ -e $(SYM_PREFIX)$(@F) $< $(LIB) $(PLATFORM_LIBGCC)
 
 $(ELF): $(obj)/%: $(obj)/%.o $(LIB) FORCE
 	$(call if_changed,link_elf)
 
-$(obj)/%.srec: OBJCOPYFLAGS := -O srec
+$(obj)/%.srec: OBJCOPYFLAGS += -O srec
 $(obj)/%.srec: $(obj)/% FORCE
 	$(call if_changed,objcopy)
 
-$(obj)/%.bin: OBJCOPYFLAGS := -O binary
+$(obj)/%.bin: OBJCOPYFLAGS += -O binary
 $(obj)/%.bin: $(obj)/% FORCE
 	$(call if_changed,objcopy)
 

examples/standalone/mips.lds

@@ -1,42 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd@denx.de>
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradlittlemips")
-OUTPUT_ARCH(mips)
-SECTIONS
-{
-	.text       :
-	{
-	  *(.text*)
-	}
-
-	. = ALIGN(4);
-	.rodata  : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
-	. = ALIGN(4);
-	.data  : { *(.data*) }
-
-	. = .;
-	_gp = ALIGN(16) + 0x7ff0;
-
-	.got : {
-	  __got_start = .;
-	  *(.got)
-	  __got_end = .;
-	}
-
-	.sdata  : { *(.sdata*) }
-
-	. = ALIGN(4);
-	__bss_start = .;
-	.sbss (NOLOAD) : { *(.sbss*) }
-	.bss (NOLOAD)  : { *(.bss*) . = ALIGN(4); }
-
-	_end = .;
-}

examples/standalone/mips64.lds

@@ -1,42 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2003
- * Wolfgang Denk Engineering, <wd@denx.de>
- */
-
-/*
-OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
-*/
-OUTPUT_FORMAT("elf64-tradbigmips", "elf64-tradbigmips", "elf64-tradlittlemips")
-OUTPUT_ARCH(mips)
-SECTIONS
-{
-	.text       :
-	{
-	  *(.text*)
-	}
-
-	. = ALIGN(4);
-	.rodata  : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
-	. = ALIGN(4);
-	.data  : { *(.data*) }
-
-	. = .;
-	_gp = ALIGN(16) + 0x7ff0;
-
-	.got : {
-	  __got_start = .;
-	  *(.got)
-	  __got_end = .;
-	}
-
-	.sdata  : { *(.sdata*) }
-
-	. = ALIGN(4);
-	__bss_start = .;
-	.sbss (NOLOAD) : { *(.sbss*) }
-	.bss (NOLOAD)  : { *(.bss*) . = ALIGN(4); }
-
-	_end = .;
-}

include/configs/gardena-smart-gateway-mt7688.h

@@ -30,7 +30,7 @@
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		64
-#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(16 * 1024 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
 #define CONFIG_SYS_CBSIZE		512
 
@@ -38,7 +38,7 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
 
 /* Environment settings */
-#define CONFIG_ENV_OFFSET		0x80000
+#define CONFIG_ENV_OFFSET		0xa0000
 #define CONFIG_ENV_SIZE			(64 << 10)
 #define CONFIG_ENV_SECT_SIZE		(64 << 10)
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT

include/configs/linkit-smart-7688.h

@@ -38,7 +38,7 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
 
 /* Environment settings */
-#define CONFIG_ENV_OFFSET		0x40000
+#define CONFIG_ENV_OFFSET		0x80000
 #define CONFIG_ENV_SIZE			(16 << 10)
 #define CONFIG_ENV_SECT_SIZE		(64 << 10)