PCI: autoconfig: Don't allocate 64-bit addresses to 32-bit only resources

Currently, if we happen to allocate an address requiring 64 bits to a
device only supporting 32-bit BARs, the address eventually gets silently
truncated to 32 bits. Avoid this by adding a new flag to
pciauto_region_allocate() to bail out in such situations.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>

drivers/pci/pci_auto.c

@@ -98,7 +98,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
 		}
 
 		if (!enum_only && pciauto_region_allocate(bar_res, bar_size,
-							  &bar_value) == 0) {
+							  &bar_value,
+							  found_mem64) == 0) {
 			/* Write it out and update our limit */
 			dm_pci_write_config32(dev, bar, (u32)bar_value);
 
@@ -140,7 +141,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
 				debug("PCI Autoconfig: ROM, size=%#x, ",
 				      (unsigned int)bar_size);
 				if (pciauto_region_allocate(mem, bar_size,
-							    &bar_value) == 0) {
+							    &bar_value,
+							    false) == 0) {
 					dm_pci_write_config32(dev, rom_addr,
 							      bar_value);
 				}

drivers/pci/pci_auto_common.c

@@ -32,7 +32,7 @@ void pciauto_region_align(struct pci_region *res, pci_size_t size)
 }
 
 int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
-	pci_addr_t *bar)
+	pci_addr_t *bar, bool supports_64bit)
 {
 	pci_addr_t addr;
 
@@ -48,6 +48,11 @@ int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
 		goto error;
 	}
 
+	if (upper_32_bits(addr) && !supports_64bit) {
+		debug("Cannot assign 64-bit address to 32-bit-only resource\n");
+		goto error;
+	}
+
 	res->bus_lower = addr + size;
 
 	debug("address=0x%llx bus_lower=0x%llx\n", (unsigned long long)addr,

drivers/pci/pci_auto_old.c

@@ -108,7 +108,8 @@ void pciauto_setup_device(struct pci_controller *hose,
 		}
 
 #ifndef CONFIG_PCI_ENUM_ONLY
-		if (pciauto_region_allocate(bar_res, bar_size, &bar_value) == 0) {
+		if (pciauto_region_allocate(bar_res, bar_size,
+					    &bar_value, found_mem64) == 0) {
 			/* Write it out and update our limit */
 			pci_hose_write_config_dword(hose, dev, bar, (u32)bar_value);
 
@@ -150,7 +151,7 @@ void pciauto_setup_device(struct pci_controller *hose,
 			debug("PCI Autoconfig: ROM, size=%#x, ",
 			      (unsigned int)bar_size);
 			if (pciauto_region_allocate(mem, bar_size,
-						    &bar_value) == 0) {
+						    &bar_value, false) == 0) {
 				pci_hose_write_config_dword(hose, dev, rom_addr,
 							    bar_value);
 			}

include/pci.h

@@ -681,7 +681,7 @@ void pciauto_region_init(struct pci_region *res);
 void pciauto_region_align(struct pci_region *res, pci_size_t size);
 void pciauto_config_init(struct pci_controller *hose);
 int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
-			    pci_addr_t *bar);
+			    pci_addr_t *bar, bool supports_64bit);
 
 #if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
 extern int pci_hose_read_config_byte_via_dword(struct pci_controller *hose,