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@@ -229,21 +229,21 @@ static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv, u8 fmode)
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imode = STM32_QSPI_CCR_IMODE_ONE_LINE;
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admode = STM32_QSPI_CCR_ADMODE_ONE_LINE;
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-
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- if (mode & SPI_RX_QUAD) {
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- dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
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- if (mode & SPI_TX_QUAD) {
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- imode = STM32_QSPI_CCR_IMODE_FOUR_LINE;
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- admode = STM32_QSPI_CCR_ADMODE_FOUR_LINE;
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- }
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- } else if (mode & SPI_RX_DUAL) {
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- dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
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- if (mode & SPI_TX_DUAL) {
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- imode = STM32_QSPI_CCR_IMODE_TWO_LINE;
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- admode = STM32_QSPI_CCR_ADMODE_TWO_LINE;
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+ dmode = STM32_QSPI_CCR_DMODE_ONE_LINE;
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+
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+ if ((priv->command & CMD_HAS_ADR) && (priv->command & CMD_HAS_DATA)) {
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+ if (fmode == STM32_QSPI_CCR_IND_WRITE) {
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+ if (mode & SPI_TX_QUAD)
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+ dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
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+ else if (mode & SPI_TX_DUAL)
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+ dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
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+ } else if ((fmode == STM32_QSPI_CCR_MEM_MAP) ||
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+ (fmode == STM32_QSPI_CCR_IND_READ)) {
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+ if (mode & SPI_RX_QUAD)
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+ dmode = STM32_QSPI_CCR_DMODE_FOUR_LINE;
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+ else if (mode & SPI_RX_DUAL)
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+ dmode = STM32_QSPI_CCR_DMODE_TWO_LINE;
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}
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- } else {
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- dmode = STM32_QSPI_CCR_DMODE_ONE_LINE;
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}
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if (priv->command & CMD_HAS_DATA)
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