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@@ -15,6 +15,7 @@
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#endif
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#ifdef CONFIG_FSL_LSCH3
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#include <asm/arch-fsl-layerscape/immap_lsch3.h>
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+#include <asm/arch-fsl-layerscape/soc.h>
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#endif
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ENTRY(lowlevel_init)
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@@ -140,6 +141,16 @@ ENTRY(lowlevel_init)
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#endif
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#ifdef CONFIG_FSL_TZASC_400
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+ /*
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+ * LS2080 and its personalities does not support TZASC
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+ * So skip TZASC related operations
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+ */
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+ bl get_svr
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+ lsr w0, w0, #16
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+ ldr w1, =SVR_DEV_LS2080A
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+ cmp w0, w1
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+ b.eq 1f
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+
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/* Set TZASC so that:
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* a. We use only Region0 whose global secure write/read is EN
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* b. We use only Region0 whose NSAID write/read is EN
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@@ -182,7 +193,7 @@ ENTRY(lowlevel_init)
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isb
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dsb sy
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#endif
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-
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+1:
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#ifdef CONFIG_ARCH_LS1046A
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/* Initialize the L2 RAM latency */
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mrs x1, S3_1_c11_c0_2
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