armv8: SECURE_BOOT: Enable chain of trust on LS1012A platform

Define bootscript and its header addresses for QSPI target
Also add PPA header address in Kconfig

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

arch/arm/cpu/armv8/fsl-layerscape/Kconfig

@@ -177,6 +177,7 @@ config SYS_LS_PPA_ESBC_ADDR
 	depends on FSL_LS_PPA && CHAIN_OF_TRUST
 	default 0x600c0000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A
 	default 0x40740000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
+	default 0x40480000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A
 	default 0x580c40000 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
 	help
 	  If the PPA header firmware locate at XIP flash, such as NOR or

arch/arm/include/asm/arch-fsl-layerscape/config.h

@@ -185,7 +185,12 @@
 #elif defined(CONFIG_ARCH_LS1012A)
 #define GICD_BASE		0x01401000
 #define GICC_BASE		0x01402000
-
+#define CONFIG_SYS_FSL_SFP_VER_3_2
+#define CONFIG_SYS_FSL_SEC_MON_BE
+#define CONFIG_SYS_FSL_SFP_BE
+#define CONFIG_SYS_FSL_SRK_LE
+#define CONFIG_KEY_REVOCATION
+#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC           1
 #define CONFIG_SYS_DDR_BLOCK1_SIZE	((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED		CONFIG_SYS_DDR_BLOCK1_SIZE
 

arch/arm/include/asm/fsl_secure_boot.h

@@ -95,6 +95,9 @@
 #ifdef CONFIG_ARCH_LS1046A
 #define CONFIG_BS_HDR_ADDR_DEVICE	0x40780000
 #define CONFIG_BS_ADDR_DEVICE		0x40800000
+#elif defined(CONFIG_ARCH_LS1012A)
+#define CONFIG_BS_HDR_ADDR_DEVICE      0x400c0000
+#define CONFIG_BS_ADDR_DEVICE          0x40060000
 #else
 #error "Platform not supported"
 #endif