ARM: rmobile: Fix module clock controls refer status on Gen3

When referring to the MSTPSR register, it contains the clock
status of SYS, RT, SECURE, and controlling SMSTPCR using this
value has the problem of being affected by the RT and SECURE
status.This patch changes the reference register to SMSTPCR.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>

board/renesas/draak/draak.c

@@ -39,7 +39,7 @@ int board_early_init_f(void)
 {
 #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
 	/* DVFS for reset */
-	mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);
+	mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
 #endif
 	return 0;
 }
@@ -60,7 +60,7 @@ int board_init(void)
 	setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
 
 	/* Configure the HSUSB block */
-	mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704);
+	mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
 	/* Choice USB0SEL */
 	clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
 			HSUSB_REG_UGCTRL2_USB0SEL_EHCI);

board/renesas/salvator-x/salvator-x.c

@@ -39,7 +39,7 @@ int board_early_init_f(void)
 {
 #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
 	/* DVFS for reset */
-	mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);
+	mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
 #endif
 	return 0;
 }
@@ -60,7 +60,7 @@ int board_init(void)
 	setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
 
 	/* Configure the HSUSB block */
-	mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704);
+	mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
 	/* Choice USB0SEL */
 	clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
 			HSUSB_REG_UGCTRL2_USB0SEL_EHCI);

board/renesas/ulcb/ulcb.c

@@ -39,7 +39,7 @@ int board_early_init_f(void)
 {
 #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
 	/* DVFS for reset */
-	mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);
+	mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
 #endif
 	return 0;
 }
@@ -60,7 +60,7 @@ int board_init(void)
 	setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
 
 	/* Configure the HSUSB block */
-	mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704);
+	mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
 	/* Choice USB0SEL */
 	clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
 			HSUSB_REG_UGCTRL2_USB0SEL_EHCI);