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@@ -8,6 +8,15 @@
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*/
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#include <phy.h>
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+#define AR803x_PHY_DEBUG_ADDR_REG 0x1d
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+#define AR803x_PHY_DEBUG_DATA_REG 0x1e
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+
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+#define AR803x_DEBUG_REG_5 0x5
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+#define AR803x_RGMII_TX_CLK_DLY 0x100
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+
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+#define AR803x_DEBUG_REG_0 0x0
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+#define AR803x_RGMII_RX_CLK_DLY 0x8000
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+
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static int ar8021_config(struct phy_device *phydev)
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{
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phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
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@@ -17,6 +26,32 @@ static int ar8021_config(struct phy_device *phydev)
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return 0;
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}
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+static int ar8031_config(struct phy_device *phydev)
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+{
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+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
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+ phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
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+ phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
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+ AR803x_DEBUG_REG_5);
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+ phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
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+ AR803x_RGMII_TX_CLK_DLY);
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+ }
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+
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+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
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+ phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
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+ phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
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+ AR803x_DEBUG_REG_0);
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+ phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
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+ AR803x_RGMII_RX_CLK_DLY);
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+ }
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+
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+ phydev->supported = phydev->drv->features;
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+
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+ genphy_config_aneg(phydev);
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+ genphy_restart_aneg(phydev);
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+
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+ return 0;
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+}
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+
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static int ar8035_config(struct phy_device *phydev)
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{
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int regval;
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@@ -70,7 +105,7 @@ static struct phy_driver AR8031_driver = {
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.uid = 0x4dd074,
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.mask = 0xffffffef,
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.features = PHY_GBIT_FEATURES,
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- .config = ar8035_config,
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+ .config = ar8031_config,
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.startup = genphy_startup,
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.shutdown = genphy_shutdown,
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};
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