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@@ -1,137 +0,0 @@
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-/*
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- * (C) Copyright 2001
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- * Thomas Koeller, tkoeller@gmx.net
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- *
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- * SPDX-License-Identifier: GPL-2.0+
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- */
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-
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-#ifndef __ASSEMBLY__
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-#define __ASSEMBLY__ 1
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-#endif
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-
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-#include <asm-offsets.h>
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-#include <config.h>
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-#include <asm/processor.h>
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-#include <mpc824x.h>
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-#include <ppc_asm.tmpl>
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-
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-#if defined(USE_DINK32)
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- /* We are running from RAM, so do not clear the MCCR1_MEMGO bit! */
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- #define MCCR1VAL ((CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
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-#else
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- #define MCCR1VAL (CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT)
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-#endif
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-
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- .text
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-
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- /* Values to program into memory controller registers */
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-tbl: .long MCCR1, MCCR1VAL
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- .long MCCR2, CONFIG_SYS_REFINT << MCCR2_REFINT_SHIFT
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- .long MCCR3
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- .long (((CONFIG_SYS_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
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- (CONFIG_SYS_REFREC << MCCR3_REFREC_SHIFT) | \
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- (CONFIG_SYS_RDLAT << MCCR3_RDLAT_SHIFT)
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- .long MCCR4
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- .long (CONFIG_SYS_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CONFIG_SYS_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
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- (CONFIG_SYS_REGISTERD_TYPE_BUFFER << 20) | \
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- (((CONFIG_SYS_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
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- ((CONFIG_SYS_SDMODE_CAS_LAT << 4) | (CONFIG_SYS_SDMODE_WRAP << 3) | \
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- (CONFIG_SYS_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
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- (CONFIG_SYS_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
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- ((CONFIG_SYS_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
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- .long MSAR1
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- .long (((CONFIG_SYS_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
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- (((CONFIG_SYS_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
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- (((CONFIG_SYS_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
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- (((CONFIG_SYS_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
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- .long EMSAR1
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- .long (((CONFIG_SYS_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
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- (((CONFIG_SYS_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
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- (((CONFIG_SYS_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
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- (((CONFIG_SYS_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
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- .long MSAR2
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- .long (((CONFIG_SYS_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
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- (((CONFIG_SYS_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
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- (((CONFIG_SYS_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
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- (((CONFIG_SYS_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
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- .long EMSAR2
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- .long (((CONFIG_SYS_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
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- (((CONFIG_SYS_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
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- (((CONFIG_SYS_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
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- (((CONFIG_SYS_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
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- .long MEAR1
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- .long (((CONFIG_SYS_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
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- (((CONFIG_SYS_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
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- (((CONFIG_SYS_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
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- (((CONFIG_SYS_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
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- .long EMEAR1
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- .long (((CONFIG_SYS_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
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- (((CONFIG_SYS_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
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- (((CONFIG_SYS_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
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- (((CONFIG_SYS_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
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- .long MEAR2
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- .long (((CONFIG_SYS_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \
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- (((CONFIG_SYS_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \
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- (((CONFIG_SYS_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
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- (((CONFIG_SYS_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
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- .long EMEAR2
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- .long (((CONFIG_SYS_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 0) | \
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- (((CONFIG_SYS_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 8) | \
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- (((CONFIG_SYS_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
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- (((CONFIG_SYS_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
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- .long 0
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-
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-
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- /*
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- * Early CPU initialization. Set up memory controller, so we can access any RAM at all. This
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- * must be done in assembly, since we have no stack at this point.
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- */
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- .global early_init_f
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-early_init_f:
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- mflr r10
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-
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- /* basic memory controller configuration */
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- lis r3, CONFIG_ADDR_HIGH
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- lis r4, CONFIG_DATA_HIGH
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- bl lab
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-lab: mflr r5
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- lwzu r0, tbl - lab(r5)
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-loop: lwz r1, 4(r5)
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- stwbrx r0, 0, r3
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- eieio
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- stwbrx r1, 0, r4
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- eieio
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- lwzu r0, 8(r5)
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- cmpli cr0, 0, r0, 0
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- bne cr0, loop
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-
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- /* set bank enable bits */
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- lis r0, MBER@h
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- ori r0, 0, MBER@l
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- li r1, CONFIG_SYS_BANK_ENABLE
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- stwbrx r0, 0, r3
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- eieio
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- stb r1, 0(r4)
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- eieio
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-
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- /* delay loop */
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- lis r0, 0x0003
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- mtctr r0
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-delay: bdnz delay
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-
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- /* enable memory controller */
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- lis r0, MCCR1@h
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- ori r0, 0, MCCR1@l
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- stwbrx r0, 0, r3
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- eieio
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- lwbrx r0, 0, r4
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- oris r0, 0, MCCR1_MEMGO@h
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- stwbrx r0, 0, r4
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- eieio
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-
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- /* set up stack pointer */
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- lis r1, CONFIG_SYS_INIT_SP_OFFSET@h
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- ori r1, r1, CONFIG_SYS_INIT_SP_OFFSET@l
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-
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- mtlr r10
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- blr
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