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@@ -10,6 +10,7 @@
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*/
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#include <common.h>
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+#include <clk.h>
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#include <mmc.h>
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#include <part.h>
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#include <malloc.h>
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@@ -18,8 +19,11 @@
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#include <asm/byteorder.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/hardware.h>
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+#include <dm/device.h>
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#include "atmel_mci.h"
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+DECLARE_GLOBAL_DATA_PTR;
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+
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#ifndef CONFIG_SYS_MMC_CLK_OD
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# define CONFIG_SYS_MMC_CLK_OD 150000
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#endif
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@@ -37,6 +41,10 @@ struct atmel_mci_priv {
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struct atmel_mci *mci;
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unsigned int initialized:1;
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unsigned int curr_clk;
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+#ifdef CONFIG_DM_MMC
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+ struct mmc mmc;
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+ ulong bus_clk_rate;
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+#endif
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};
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/* Read Atmel MCI IP version */
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@@ -58,11 +66,19 @@ static void dump_cmd(u32 cmdr, u32 arg, u32 status, const char* msg)
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}
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/* Setup for MCI Clock and Block Size */
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+#ifdef CONFIG_DM_MMC
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+static void mci_set_mode(struct atmel_mci_priv *priv, u32 hz, u32 blklen)
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+{
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+ struct mmc *mmc = &priv->mmc;
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+ u32 bus_hz = priv->bus_clk_rate;
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+#else
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static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
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{
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struct atmel_mci_priv *priv = mmc->priv;
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- atmel_mci_t *mci = priv->mci;
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u32 bus_hz = get_mci_clk_rate();
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+#endif
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+
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+ atmel_mci_t *mci = priv->mci;
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u32 clkdiv = 255;
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unsigned int version = atmel_mci_get_version(mci);
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u32 clkodd = 0;
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@@ -202,10 +218,18 @@ io_fail:
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* Sends a command out on the bus and deals with the block data.
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* Takes the mmc pointer, a command pointer, and an optional data pointer.
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*/
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+#ifdef CONFIG_DM_MMC
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+static int atmel_mci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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+ struct mmc_data *data)
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+{
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+ struct atmel_mci_priv *priv = dev_get_priv(dev);
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+ struct mmc *mmc = mmc_get_mmc_dev(dev);
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+#else
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static int
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mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
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{
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struct atmel_mci_priv *priv = mmc->priv;
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+#endif
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atmel_mci_t *mci = priv->mci;
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u32 cmdr;
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u32 error_flags = 0;
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@@ -335,17 +359,28 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
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return 0;
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}
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+#ifdef CONFIG_DM_MMC
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+static int atmel_mci_set_ios(struct udevice *dev)
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+{
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+ struct atmel_mci_priv *priv = dev_get_priv(dev);
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+ struct mmc *mmc = mmc_get_mmc_dev(dev);
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+#else
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/* Entered into mmc structure during driver init */
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static int mci_set_ios(struct mmc *mmc)
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{
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struct atmel_mci_priv *priv = mmc->priv;
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+#endif
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atmel_mci_t *mci = priv->mci;
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int bus_width = mmc->bus_width;
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unsigned int version = atmel_mci_get_version(mci);
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int busw;
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/* Set the clock speed */
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+#ifdef CONFIG_DM_MMC
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+ mci_set_mode(priv, mmc->clock, MMC_DEFAULT_BLKLEN);
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+#else
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mci_set_mode(mmc, mmc->clock, MMC_DEFAULT_BLKLEN);
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+#endif
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/*
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* set the bus width and select slot for this interface
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@@ -374,10 +409,15 @@ static int mci_set_ios(struct mmc *mmc)
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return 0;
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}
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+#ifdef CONFIG_DM_MMC
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+static int atmel_mci_hw_init(struct atmel_mci_priv *priv)
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+{
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+#else
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/* Entered into mmc structure during driver init */
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static int mci_init(struct mmc *mmc)
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{
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struct atmel_mci_priv *priv = mmc->priv;
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+#endif
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atmel_mci_t *mci = priv->mci;
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/* Initialize controller */
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@@ -392,11 +432,16 @@ static int mci_init(struct mmc *mmc)
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writel(~0UL, &mci->idr);
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/* Set default clocks and blocklen */
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+#ifdef CONFIG_DM_MMC
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+ mci_set_mode(priv, CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
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+#else
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mci_set_mode(mmc, CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
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+#endif
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return 0;
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}
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+#ifndef CONFIG_DM_MMC
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static const struct mmc_ops atmel_mci_ops = {
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.send_cmd = mci_send_cmd,
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.set_ios = mci_set_ios,
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@@ -456,3 +501,114 @@ int atmel_mci_init(void *regs)
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return 0;
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}
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+#endif
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+
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+#ifdef CONFIG_DM_MMC
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+static const struct dm_mmc_ops atmel_mci_mmc_ops = {
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+ .send_cmd = atmel_mci_send_cmd,
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+ .set_ios = atmel_mci_set_ios,
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+};
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+
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+static void atmel_mci_setup_cfg(struct atmel_mci_priv *priv)
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+{
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+ struct mmc_config *cfg;
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+ u32 version;
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+
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+ cfg = &priv->cfg;
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+ cfg->name = "Atmel mci";
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+ cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
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+
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+ /*
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+ * If the version is above 3.0, the capabilities of the 8-bit
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+ * bus width and high speed are supported.
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+ */
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+ version = atmel_mci_get_version(priv->mci);
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+ if ((version & 0xf00) >= 0x300) {
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+ cfg->host_caps = MMC_MODE_8BIT |
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+ MMC_MODE_HS | MMC_MODE_HS_52MHz;
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+ }
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+
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+ cfg->host_caps |= MMC_MODE_4BIT;
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+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
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+ cfg->f_min = priv->bus_clk_rate / (2 * 256);
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+ cfg->f_max = priv->bus_clk_rate / 2;
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+}
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+
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+static int atmel_mci_enable_clk(struct udevice *dev)
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+{
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+ struct atmel_mci_priv *priv = dev_get_priv(dev);
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+ struct clk clk;
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+ ulong clk_rate;
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+ int ret = 0;
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+
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+ ret = clk_get_by_index(dev, 0, &clk);
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+ if (ret) {
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+ ret = -EINVAL;
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+ goto failed;
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+ }
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+
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+ ret = clk_enable(&clk);
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+ if (ret)
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+ goto failed;
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+
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+ clk_rate = clk_get_rate(&clk);
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+ if (!clk_rate) {
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+ ret = -EINVAL;
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+ goto failed;
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+ }
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+
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+ priv->bus_clk_rate = clk_rate;
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+
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+failed:
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+ clk_free(&clk);
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+
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+ return ret;
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+}
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+
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+static int atmel_mci_probe(struct udevice *dev)
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+{
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+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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+ struct atmel_mci_priv *priv = dev_get_priv(dev);
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+ struct mmc *mmc;
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+ int ret;
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+
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+ ret = atmel_mci_enable_clk(dev);
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+ if (ret)
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+ return ret;
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+
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+ priv->mci = (struct atmel_mci *)dev_get_addr_ptr(dev);
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+
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+ atmel_mci_setup_cfg(priv);
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+
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+ mmc = &priv->mmc;
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+ mmc->cfg = &priv->cfg;
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+ mmc->dev = dev;
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+ upriv->mmc = mmc;
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+
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+ atmel_mci_hw_init(priv);
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+
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+ return 0;
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+}
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+
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+static int atmel_mci_bind(struct udevice *dev)
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+{
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+ struct atmel_mci_priv *priv = dev_get_priv(dev);
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+
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+ return mmc_bind(dev, &priv->mmc, &priv->cfg);
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+}
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+
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+static const struct udevice_id atmel_mci_ids[] = {
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+ { .compatible = "atmel,hsmci" },
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+ { }
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+};
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+
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+U_BOOT_DRIVER(atmel_mci) = {
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+ .name = "atmel-mci",
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+ .id = UCLASS_MMC,
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+ .of_match = atmel_mci_ids,
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+ .bind = atmel_mci_bind,
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+ .probe = atmel_mci_probe,
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+ .priv_auto_alloc_size = sizeof(struct atmel_mci_priv),
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+ .ops = &atmel_mci_mmc_ops,
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+};
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+#endif
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