sunxi: Fix buggy sun6i/sun8i DRAM size detection logic

After reboot, reset or even short power off, DRAM typically retains
the old stale data for some period of time (for this type of memory,
the bits of data are stored in slowly discharging capacitors).

The current sun6i/sun8i DRAM size detection logic, which is
inherited from the Allwinner code, relies on using a large magic
signature with the hope that it is unique enough and unlikely to
ever accidentally match this leftover garbage data in RAM. But
this approach is inherently unsafe, as can be demonstrated using
the following test program:

/***** A testcase for reproducing the problem ******/

void main(int argc, char *argv[])
{
    size_t size, i;
    uint32_t *buf;
    /* Allocate the buffer */
    if (argc < 2 || !(size = (size_t)atoi(argv[1]) * 1048576) ||
                    !(buf = malloc(size))) {
        printf("Need buffer size in MiB as a cmdline argument\n");
        exit(1);
    }
    /* Fill it with the Allwinner DRAM "magic" values */
    for (i = 0; i < size / 4; i++)
        buf[i] = 0xaa55aa55 + ((uintptr_t)&buf[i] / 4) % 64;
    /* Try to reboot */
    system("reboot");
    /* And wait */
    for (;;) {}
}
/***************************************************/

If this test program is run on the device (giving it a large
chunk of memory), then the DRAM size detection logic in u-boot
gets confused after reboot and fails to initialize DRAM properly.

A better approach is not to rely on luck and abstain from making
any assumptions about the properties of the leftover garbage
data in RAM. Instead just use a more reliable code for testing
whether two different addresses refer to the same memory location.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

arch/arm/cpu/armv7/sunxi/dram_sun6i.c

@@ -377,7 +377,6 @@ unsigned long sunxi_dram_init(void)
 		    MCTL_CR_BANK(1) | MCTL_CR_RANK(1));
 
 	/* Detect and set page size */
-	mctl_mem_fill();
 	for (columns = 7; columns < 20; columns++) {
 		if (mctl_mem_matches(1 << columns))
 			break;

arch/arm/cpu/armv7/sunxi/dram_sun8i.c

@@ -289,7 +289,6 @@ unsigned long sunxi_dram_init(void)
 		writel(0x000310f4 | MCTL_CR_PAGE_SIZE(page_size),
 		       &mctl_com->cr);
 		setbits_le32(&mctl_com->swonr, 0x0003ffff);
-		mctl_mem_fill();
 		for (rows = 11; rows < 16; rows++) {
 			offset = 1 << (rows + columns + bus);
 			if (mctl_mem_matches(offset))

arch/arm/include/asm/arch-sunxi/dram.h

@@ -24,8 +24,6 @@
 #include <asm/arch/dram_sun4i.h>
 #endif
 
-#define MCTL_MEM_FILL_MATCH_COUNT 64
-
 unsigned long sunxi_dram_init(void);
 
 /*
@@ -41,25 +39,17 @@ static inline void mctl_await_completion(u32 *reg, u32 mask, u32 val)
 	}
 }
 
-/*
- * Fill beginning of DRAM with "random" data for mctl_mem_matches()
- */
-static inline void mctl_mem_fill(void)
-{
-	int i;
-
-	for (i = 0; i < MCTL_MEM_FILL_MATCH_COUNT; i++)
-		writel(0xaa55aa55 + i, CONFIG_SYS_SDRAM_BASE + i * 4);
-}
-
 /*
  * Test if memory at offset offset matches memory at begin of DRAM
  */
 static inline bool mctl_mem_matches(u32 offset)
 {
-	return memcmp((u32 *)CONFIG_SYS_SDRAM_BASE,
-		      (u32 *)(CONFIG_SYS_SDRAM_BASE + offset),
-		      MCTL_MEM_FILL_MATCH_COUNT * 4) == 0;
+	/* Try to write different values to RAM at two addresses */
+	writel(0, CONFIG_SYS_SDRAM_BASE);
+	writel(0xaa55aa55, CONFIG_SYS_SDRAM_BASE + offset);
+	/* Check if the same value is actually observed when reading back */
+	return readl(CONFIG_SYS_SDRAM_BASE) ==
+	       readl(CONFIG_SYS_SDRAM_BASE + offset);
 }
 
 #endif /* _SUNXI_DRAM_H */