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@@ -357,6 +357,54 @@ struct vcores_data dra752_volts = {
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.iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
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};
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+struct vcores_data dra76x_volts = {
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+ .mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM,
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+ .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
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+ .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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+ .mpu.addr = LP87565_REG_ADDR_BUCK01,
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+ .mpu.pmic = &lp87565,
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+ .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
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+
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+ .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM,
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+ .eve.value[OPP_OD] = VDD_EVE_DRA7_OD,
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+ .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH,
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+ .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
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+ .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
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+ .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
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+ .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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+ .eve.addr = TPS65917_REG_ADDR_SMPS1,
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+ .eve.pmic = &tps659038,
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+ .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
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+
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+ .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM,
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+ .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD,
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+ .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH,
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+ .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
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+ .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
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+ .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
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+ .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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+ .gpu.addr = LP87565_REG_ADDR_BUCK23,
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+ .gpu.pmic = &lp87565,
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+ .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
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+
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+ .core.value[OPP_NOM] = VDD_CORE_DRA7_NOM,
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+ .core.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_CORE_NOM,
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+ .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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+ .core.addr = TPS65917_REG_ADDR_SMPS3,
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+ .core.pmic = &tps659038,
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+
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+ .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM,
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+ .iva.value[OPP_OD] = VDD_IVA_DRA7_OD,
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+ .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH,
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+ .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM,
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+ .iva.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_IVA_OD,
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+ .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH,
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+ .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
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+ .iva.addr = TPS65917_REG_ADDR_SMPS4,
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+ .iva.pmic = &tps659038,
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+ .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
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+};
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+
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struct vcores_data dra722_volts = {
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.mpu.value[OPP_NOM] = VDD_MPU_DRA7_NOM,
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.mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
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@@ -622,6 +670,8 @@ void vcores_init(void)
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*omap_vcores = &dra722_volts;
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} else if (board_is_dra71x_evm()) {
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*omap_vcores = &dra718_volts;
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+ } else if (board_is_dra76x_evm()) {
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+ *omap_vcores = &dra76x_volts;
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} else {
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/* If EEPROM is not populated */
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if (is_dra72x())
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