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@@ -11,7 +11,7 @@
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#include <linux/mtd/nand_ecc.h>
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static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
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-static struct mtd_info mtd;
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+static struct mtd_info *mtd;
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static struct nand_chip nand_chip;
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#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
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@@ -26,32 +26,32 @@ static struct nand_chip nand_chip;
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static int nand_command(int block, int page, uint32_t offs,
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u8 cmd)
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{
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- struct nand_chip *this = mtd.priv;
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+ struct nand_chip *this = mtd->priv();
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int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
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- while (!this->dev_ready(&mtd))
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+ while (!this->dev_ready(mtd))
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;
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/* Begin command latch cycle */
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- this->cmd_ctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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+ this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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/* Set ALE and clear CLE to start address cycle */
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/* Column address */
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- this->cmd_ctrl(&mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
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- this->cmd_ctrl(&mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
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- this->cmd_ctrl(&mtd, (page_addr >> 8) & 0xff,
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+ this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
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+ this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
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+ this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
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NAND_CTRL_ALE); /* A[24:17] */
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#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
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/* One more address cycle for devices > 32MiB */
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- this->cmd_ctrl(&mtd, (page_addr >> 16) & 0x0f,
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+ this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
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NAND_CTRL_ALE); /* A[28:25] */
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#endif
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/* Latch in address */
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- this->cmd_ctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
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+ this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
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/*
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* Wait a while for the data to be ready
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*/
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- while (!this->dev_ready(&mtd))
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+ while (!this->dev_ready(mtd))
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;
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return 0;
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@@ -63,12 +63,12 @@ static int nand_command(int block, int page, uint32_t offs,
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static int nand_command(int block, int page, uint32_t offs,
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u8 cmd)
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{
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- struct nand_chip *this = mtd.priv;
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+ struct nand_chip *this = mtd->priv;
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int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
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void (*hwctrl)(struct mtd_info *mtd, int cmd,
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unsigned int ctrl) = this->cmd_ctrl;
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- while (!this->dev_ready(&mtd))
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+ while (!this->dev_ready(mtd))
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;
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/* Emulate NAND_CMD_READOOB */
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@@ -82,30 +82,30 @@ static int nand_command(int block, int page, uint32_t offs,
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offs >>= 1;
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/* Begin command latch cycle */
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- hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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+ hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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/* Set ALE and clear CLE to start address cycle */
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/* Column address */
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- hwctrl(&mtd, offs & 0xff,
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- NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
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- hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
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+ hwctrl(mtd, offs & 0xff,
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+ NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
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+ hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
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/* Row address */
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- hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
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- hwctrl(&mtd, ((page_addr >> 8) & 0xff),
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- NAND_CTRL_ALE); /* A[27:20] */
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+ hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
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+ hwctrl(mtd, ((page_addr >> 8) & 0xff),
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+ NAND_CTRL_ALE); /* A[27:20] */
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#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
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/* One more address cycle for devices > 128MiB */
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- hwctrl(&mtd, (page_addr >> 16) & 0x0f,
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+ hwctrl(mtd, (page_addr >> 16) & 0x0f,
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NAND_CTRL_ALE); /* A[31:28] */
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#endif
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/* Latch in address */
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- hwctrl(&mtd, NAND_CMD_READSTART,
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- NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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- hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
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+ hwctrl(mtd, NAND_CMD_READSTART,
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+ NAND_CTRL_CLE | NAND_CTRL_CHANGE);
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+ hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
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/*
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* Wait a while for the data to be ready
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*/
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- while (!this->dev_ready(&mtd))
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+ while (!this->dev_ready(mtd))
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;
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return 0;
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@@ -114,7 +114,7 @@ static int nand_command(int block, int page, uint32_t offs,
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static int nand_is_bad_block(int block)
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{
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- struct nand_chip *this = mtd.priv;
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+ struct nand_chip *this = mtd->priv;
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u_char bb_data[2];
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nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
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@@ -124,11 +124,11 @@ static int nand_is_bad_block(int block)
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* Read one byte (or two if it's a 16 bit chip).
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*/
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if (this->options & NAND_BUSWIDTH_16) {
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- this->read_buf(&mtd, bb_data, 2);
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+ this->read_buf(mtd, bb_data, 2);
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if (bb_data[0] != 0xff || bb_data[1] != 0xff)
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return 1;
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} else {
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- this->read_buf(&mtd, bb_data, 1);
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+ this->read_buf(mtd, bb_data, 1);
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if (bb_data[0] != 0xff)
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return 1;
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}
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@@ -139,7 +139,7 @@ static int nand_is_bad_block(int block)
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#if defined(CONFIG_SYS_NAND_HW_ECC_OOBFIRST)
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static int nand_read_page(int block, int page, uchar *dst)
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{
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- struct nand_chip *this = mtd.priv;
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+ struct nand_chip *this = mtd->priv;
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u_char ecc_calc[ECCTOTAL];
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u_char ecc_code[ECCTOTAL];
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u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
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@@ -150,7 +150,7 @@ static int nand_read_page(int block, int page, uchar *dst)
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uint8_t *p = dst;
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nand_command(block, page, 0, NAND_CMD_READOOB);
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- this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
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+ this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
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nand_command(block, page, 0, NAND_CMD_READ0);
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/* Pick the ECC bytes out of the oob data */
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@@ -159,10 +159,10 @@ static int nand_read_page(int block, int page, uchar *dst)
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for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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- this->ecc.hwctl(&mtd, NAND_ECC_READ);
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- this->read_buf(&mtd, p, eccsize);
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- this->ecc.calculate(&mtd, p, &ecc_calc[i]);
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- this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
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+ this->ecc.hwctl(mtd, NAND_ECC_READ);
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+ this->read_buf(mtd, p, eccsize);
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+ this->ecc.calculate(mtd, p, &ecc_calc[i]);
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+ this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
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}
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return 0;
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@@ -170,7 +170,7 @@ static int nand_read_page(int block, int page, uchar *dst)
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#else
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static int nand_read_page(int block, int page, void *dst)
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{
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- struct nand_chip *this = mtd.priv;
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+ struct nand_chip *this = mtd->priv;
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u_char ecc_calc[ECCTOTAL];
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u_char ecc_code[ECCTOTAL];
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u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
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@@ -184,11 +184,11 @@ static int nand_read_page(int block, int page, void *dst)
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for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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if (this->ecc.mode != NAND_ECC_SOFT)
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- this->ecc.hwctl(&mtd, NAND_ECC_READ);
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- this->read_buf(&mtd, p, eccsize);
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- this->ecc.calculate(&mtd, p, &ecc_calc[i]);
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+ this->ecc.hwctl(mtd, NAND_ECC_READ);
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+ this->read_buf(mtd, p, eccsize);
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+ this->ecc.calculate(mtd, p, &ecc_calc[i]);
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}
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- this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
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+ this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
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/* Pick the ECC bytes out of the oob data */
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for (i = 0; i < ECCTOTAL; i++)
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@@ -202,7 +202,7 @@ static int nand_read_page(int block, int page, void *dst)
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* from correct_data(). We just hope that all possible errors
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* are corrected by this routine.
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*/
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- this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
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+ this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
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}
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return 0;
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@@ -249,7 +249,8 @@ void nand_init(void)
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/*
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* Init board specific nand support
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*/
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- mtd.priv = &nand_chip;
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+ mtd = &nand_chip.mtd;
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+ mtd->priv = &nand_chip;
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nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
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(void __iomem *)CONFIG_SYS_NAND_BASE;
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board_nand_init(&nand_chip);
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@@ -262,12 +263,12 @@ void nand_init(void)
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#endif
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if (nand_chip.select_chip)
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- nand_chip.select_chip(&mtd, 0);
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+ nand_chip.select_chip(mtd, 0);
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}
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/* Unselect after operation */
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void nand_deselect(void)
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{
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if (nand_chip.select_chip)
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- nand_chip.select_chip(&mtd, -1);
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+ nand_chip.select_chip(mtd, -1);
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}
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