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@@ -96,6 +96,10 @@ int ddr3_init(const unsigned int base,
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#define ATMEL_MPDDRC_CR_DLL_RESET_ENABLED (0x1 << 7)
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#define ATMEL_MPDDRC_CR_DIC_DS (0x1 << 8)
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#define ATMEL_MPDDRC_CR_DIS_DLL (0x1 << 9)
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+#define ATMEL_MPDDRC_CR_ZQ_INIT (0x0 << 10)
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+#define ATMEL_MPDDRC_CR_ZQ_LONG (0x1 << 10)
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+#define ATMEL_MPDDRC_CR_ZQ_SHORT (0x2 << 10)
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+#define ATMEL_MPDDRC_CR_ZQ_RESET (0x3 << 10)
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#define ATMEL_MPDDRC_CR_OCD_DEFAULT (0x7 << 12)
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#define ATMEL_MPDDRC_CR_DQMS_SHARED (0x1 << 16)
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#define ATMEL_MPDDRC_CR_ENRDM_ON (0x1 << 17)
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