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@@ -16,19 +16,18 @@
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DECLARE_GLOBAL_DATA_PTR;
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-static struct irq_router irq_router;
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static struct irq_routing_table *pirq_routing_table;
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-bool pirq_check_irq_routed(int link, u8 irq)
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+bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq)
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{
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+ struct irq_router *priv = dev_get_priv(dev);
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u8 pirq;
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- int base = irq_router.link_base;
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+ int base = priv->link_base;
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- if (irq_router.config == PIRQ_VIA_PCI)
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- pirq = x86_pci_read_config8(irq_router.bdf,
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- LINK_N2V(link, base));
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+ if (priv->config == PIRQ_VIA_PCI)
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+ pirq = x86_pci_read_config8(priv->bdf, LINK_N2V(link, base));
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else
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- pirq = readb(irq_router.ibase + LINK_N2V(link, base));
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+ pirq = readb(priv->ibase + LINK_N2V(link, base));
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pirq &= 0xf;
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@@ -39,24 +38,26 @@ bool pirq_check_irq_routed(int link, u8 irq)
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return pirq == irq ? true : false;
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}
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-int pirq_translate_link(int link)
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+int pirq_translate_link(struct udevice *dev, int link)
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{
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- return LINK_V2N(link, irq_router.link_base);
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+ struct irq_router *priv = dev_get_priv(dev);
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+
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+ return LINK_V2N(link, priv->link_base);
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}
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-void pirq_assign_irq(int link, u8 irq)
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+void pirq_assign_irq(struct udevice *dev, int link, u8 irq)
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{
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- int base = irq_router.link_base;
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+ struct irq_router *priv = dev_get_priv(dev);
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+ int base = priv->link_base;
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/* IRQ# 0/1/2/8/13 are reserved */
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if (irq < 3 || irq == 8 || irq == 13)
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return;
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- if (irq_router.config == PIRQ_VIA_PCI)
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- x86_pci_write_config8(irq_router.bdf,
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- LINK_N2V(link, base), irq);
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+ if (priv->config == PIRQ_VIA_PCI)
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+ x86_pci_write_config8(priv->bdf, LINK_N2V(link, base), irq);
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else
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- writeb(irq, irq_router.ibase + LINK_N2V(link, base));
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+ writeb(irq, priv->ibase + LINK_N2V(link, base));
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}
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static struct irq_info *check_dup_entry(struct irq_info *slot_base,
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@@ -74,17 +75,18 @@ static struct irq_info *check_dup_entry(struct irq_info *slot_base,
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return (i == entry_num) ? NULL : slot;
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}
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-static inline void fill_irq_info(struct irq_info *slot, int bus, int device,
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- int pin, int pirq)
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+static inline void fill_irq_info(struct irq_router *priv, struct irq_info *slot,
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+ int bus, int device, int pin, int pirq)
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{
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slot->bus = bus;
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slot->devfn = (device << 3) | 0;
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- slot->irq[pin - 1].link = LINK_N2V(pirq, irq_router.link_base);
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- slot->irq[pin - 1].bitmap = irq_router.irq_mask;
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+ slot->irq[pin - 1].link = LINK_N2V(pirq, priv->link_base);
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+ slot->irq[pin - 1].bitmap = priv->irq_mask;
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}
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static int create_pirq_routing_table(struct udevice *dev)
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{
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+ struct irq_router *priv = dev_get_priv(dev);
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const void *blob = gd->fdt_blob;
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int node;
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int len, count;
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@@ -98,15 +100,15 @@ static int create_pirq_routing_table(struct udevice *dev)
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node = dev->of_offset;
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/* extract the bdf from fdt_pci_addr */
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- irq_router.bdf = dm_pci_get_bdf(dev->parent);
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+ priv->bdf = dm_pci_get_bdf(dev->parent);
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ret = fdt_find_string(blob, node, "intel,pirq-config", "pci");
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if (!ret) {
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- irq_router.config = PIRQ_VIA_PCI;
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+ priv->config = PIRQ_VIA_PCI;
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} else {
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ret = fdt_find_string(blob, node, "intel,pirq-config", "ibase");
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if (!ret)
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- irq_router.config = PIRQ_VIA_IBASE;
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+ priv->config = PIRQ_VIA_IBASE;
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else
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return -EINVAL;
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}
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@@ -114,12 +116,12 @@ static int create_pirq_routing_table(struct udevice *dev)
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ret = fdtdec_get_int(blob, node, "intel,pirq-link", -1);
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if (ret == -1)
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return ret;
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- irq_router.link_base = ret;
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+ priv->link_base = ret;
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- irq_router.irq_mask = fdtdec_get_int(blob, node,
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- "intel,pirq-mask", PIRQ_BITMAP);
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+ priv->irq_mask = fdtdec_get_int(blob, node,
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+ "intel,pirq-mask", PIRQ_BITMAP);
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- if (irq_router.config == PIRQ_VIA_IBASE) {
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+ if (priv->config == PIRQ_VIA_IBASE) {
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int ibase_off;
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ibase_off = fdtdec_get_int(blob, node, "intel,ibase-offset", 0);
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@@ -136,9 +138,8 @@ static int create_pirq_routing_table(struct udevice *dev)
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* 2) memory range decoding is enabled.
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* Hence we don't do any santify test here.
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*/
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- irq_router.ibase = x86_pci_read_config32(irq_router.bdf,
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- ibase_off);
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- irq_router.ibase &= ~0xf;
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+ priv->ibase = x86_pci_read_config32(priv->bdf, ibase_off);
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+ priv->ibase &= ~0xf;
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}
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cell = fdt_getprop(blob, node, "intel,pirq-routing", &len);
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@@ -153,9 +154,8 @@ static int create_pirq_routing_table(struct udevice *dev)
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/* Populate the PIRQ table fields */
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rt->signature = PIRQ_SIGNATURE;
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rt->version = PIRQ_VERSION;
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- rt->rtr_bus = PCI_BUS(irq_router.bdf);
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- rt->rtr_devfn = (PCI_DEV(irq_router.bdf) << 3) |
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- PCI_FUNC(irq_router.bdf);
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+ rt->rtr_bus = PCI_BUS(priv->bdf);
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+ rt->rtr_devfn = (PCI_DEV(priv->bdf) << 3) | PCI_FUNC(priv->bdf);
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rt->rtr_vendor = PCI_VENDOR_ID_INTEL;
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rt->rtr_device = PCI_DEVICE_ID_INTEL_ICH7_31;
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@@ -192,7 +192,7 @@ static int create_pirq_routing_table(struct udevice *dev)
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* routing information in the device tree.
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*/
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if (slot->irq[pr.pin - 1].link !=
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- LINK_N2V(pr.pirq, irq_router.link_base))
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+ LINK_N2V(pr.pirq, priv->link_base))
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debug("WARNING: Inconsistent PIRQ routing information\n");
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continue;
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}
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@@ -200,8 +200,8 @@ static int create_pirq_routing_table(struct udevice *dev)
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slot = slot_base + irq_entries++;
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}
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debug("writing INT%c\n", 'A' + pr.pin - 1);
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- fill_irq_info(slot, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf), pr.pin,
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- pr.pirq);
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+ fill_irq_info(priv, slot, PCI_BUS(pr.bdf), PCI_DEV(pr.bdf),
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+ pr.pin, pr.pirq);
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}
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rt->size = irq_entries * sizeof(struct irq_info) + 32;
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@@ -221,7 +221,7 @@ int irq_router_common_init(struct udevice *dev)
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return ret;
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}
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/* Route PIRQ */
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- pirq_route_irqs(pirq_routing_table->slots,
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+ pirq_route_irqs(dev, pirq_routing_table->slots,
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get_irq_slot_count(pirq_routing_table));
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return 0;
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@@ -250,6 +250,7 @@ U_BOOT_DRIVER(irq_router_drv) = {
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.id = UCLASS_IRQ,
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.of_match = irq_router_ids,
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.probe = irq_router_probe,
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+ .priv_auto_alloc_size = sizeof(struct irq_router),
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};
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UCLASS_DRIVER(irq) = {
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